User manual
Remote Control
R&S
®
RTO
410User Manual 1316.0827.02 ─ 06
Bit No. Meaning
4 MAV bit (message available)
The bit is set if a message is available in the output buffer which can be read. This bit can be used
to enable data to be automatically read from the instrument to the controller.
5 ESB bit
Sum bit of the event status register. It is set if one of the bits in the event status register is set and
enabled in the event status enable register. Setting of this bit indicates a serious error which can
be specified in greater detail by polling the event status register.
6 MSS bit (master status summary bit)
The bit is set if the instrument triggers a service request. This is the case if one of the other bits of
this registers is set together with its mask bit in the service request enable register SRE.
7 OPERation status register sum bit
The bit is set if an EVENt bit is set in the OPERation status register and the associated
ENABle bit is set to 1. A set bit indicates that the instrument is just performing an action. The type
of action can be determined by polling the OPERation status register.
IST Flag and Parallel Poll Enable Register (PPE)
As with the SRQ, the IST flag combines the entire status information in a single bit. It can
be read by means of a parallel poll (see "Parallel Poll" on page 415) or using the com-
mand *IST.
The parallel poll enable register (PPE) determines which bits of the STB contribute to the
IST flag. The bits of the STB are "ANDed" with the corresponding bits of the PPE, with
bit 6 being used as well in contrast to the SRE. The IST flag results from the "ORing" of
all results. The PPE can be set using commands *PRE and read using command *PRE?.
Event Status Register (ESR) and Event Status Enable Register (ESE)
The ESR is defined in IEEE 488.2. It can be compared with the EVENt part of a SCPI
register. The event status register can be read out using command *ESR?.
The ESE corresponds to the ENABle part of a SCPI register. If a bit is set in the ESE and
the associated bit in the ESR changes from 0 to 1, the ESB bit in the STB is set. The ESE
register can be set using the command *ESE and read using the command *ESE?.
Table 16-4: Meaning of the bits used in the event status register
Bit No. Meaning
0 Operation Complete
This bit is set on receipt of the command *OPC exactly when all previous commands have been
executed.
1 Not used
2 Query Error
This bit is set if either the controller wants to read data from the instrument without having sent a
query, or if it does not fetch requested data and sends new instructions to the instrument instead.
The cause is often a query which is faulty and hence cannot be executed.
Basics