User manual

Protocol Analysis
R&S
®
RTO
257User Manual 1316.0827.02 ─ 06
10.2.1 The I²C Protocol
This chapter provides an overview of protocol characteristics, data format, address types
and trigger possibilities. For detailed information, read the "I2C-bus specification and user
manual" available on the NXP manuals web page at http://www.nxp.com/.
I²C characteristics
Main characteristics of I²C are:
●
Two-wire design: serial clock (SCL) and serial data (SDA) lines
●
Master-slave communication: the master generates the clock and addresses the
slaves. Slaves receive the address and the clock. Both master and slaves can trans-
mit and receive data.
●
Addressing scheme: each slave device is addressable by a unique address. Multiple
slave devices can be linked together and can be addressed by the same master.
●
Read/write bit: specifies if the master will read (=1) or write (=0) the data.
●
Acknowledge: takes place after every byte. The receiver of the address or data sends
the acknowledge bit to the transmitter.
The R&S RTO supports all operating speed modes: high-speed, fast mode plus, fast
mode, and standard mode.
Data transfer
The format of a simple I²C message (frame) with 7 bit addressing consists of the following
parts:
●
Start condition: a falling slope on SDA while SCL is high
●
7-bit address of the slave device that either will be written to or read from
●
R/W bit: specifies if the data will be written to or read from the slave
●
ACKnowledge bits: is issued by the receiver of the previous byte if the transfer was
successful
Exception: At read access, the master terminates the data transmission with a NACK
bit after the last byte.
●
Data: a number of data bytes with an ACK bit after every byte
●
Stop condition: a rising slope on SDA while SCL is high
Fig. 10-1: I2C write access with 7-bit address
I²C