Service manual

DRAM Interface
Pin Name Pin Type Function Pin
MVREF Input Reference Voltage for DDR SDRAM Interface 104
MCLKE Output DRAM Memory Clock Enable 105
MCLKZ Output DRAM Memory clock Complementary /Input
(for differential clocks)
106
MCLK Output DRAM Memory Clock 107
RASZ Output Row Address Strobe, active low 112
CASZ Output Column Address Strobe, active low 115
WEZ Output Write Enable, active low 116
DQM[1:0] Output Data Mask Byte Enable 101, 133
DQS[3:0] Output Data Strobe 81, 100, 134, 153
BADR[1:0] Output Memory Bank Address 110, 111
MADR[11:0] Output Memory Address 130-127, 124-117
MDATA[31:0] I/O Memory Data 82-85, 88-99,
135-138, 141-152
Misc. Interface
Pin Name Pin Type Function Pin
XIN Crystal Oscillator Input Crystal Oscillator Input 203
XOUT Crystal Oscillator Output Crystal Oscillator Output 202
DDCD_DA I/O w/ 5V-tolerant HDCP Serial Bus Data / DDC data of DVI port; 4mA driving
strength
14
DDCD_CK Input w/ 5V-Tolerant HDCP Serial Bus Clock / DDC Clock of DVI Port 15
BYPASS For External Bypass Capacitor 158
VCTRL Output Regulator Control 62
Power Pins
Pin Name Pin Type Function Pin
AVDD_DVI 3.3V Power DVI Power 4, 10
AVDD_ADC 3.3V Power ADC Power 17, 34
AVDD_PLL 3.3V Power PLL Power 12
AVDD_PLL2 3.3V Power PLL Power 109
AVDD_APLL 1.8V Power Audio PLL Power 49
AVDD_MPLL 3.3V Power PLL Power 204
CIRCUIT DESCRIPTIONS