User's Manual

Table Of Contents
S3C2450X RISC MICROPROCESSOR PRODUCT OVERVIEW
1-47
Register Name Address Reset Value
A
cc.
Unit
Read/
Write
Function
EP8BR 0x4980_0080 0x0 R/W EP8 Buffer Register
FCON 0x4980_0100 0x0 R/W Burst FIFO-DMA Control
FSTAT 0x4980_0104 0x0 R Burst FIFO status
ESR 0x4980_002C 0x0 R/W Endpoints Status Register
ECR 0x4980_0030 0x0 R/W Endpoints Control Register
BRCR 0x4980_0034 0x0 R Byte Read Count Register
BWCR 0x4980_0038 0x0 R/W Byte Write Count Register
MPR 0x4980_003C 0x0 R/W Max Packet Register
DCR 0x4980_0040 0x0 R/W DMA Control Register
DTCR 0x4980_0044 0x0 R/W DMA Transfer Counter Register
DFCR 0x4980_0048 0x0 R/W DMA FIFO Counter Register
DTTCR1 0x4980_004C 0x0 R/W DMA Total Transfer Counter1 Register
DTTCR2 0x4980_0050 0x0 R/W DMA Total Transfer Counter2 Register
MICR 0x4980_0084 0x0 R/W Master Interface Control Register
MBAR 0x4980_0088 0x0 R/W Memory Base Address Register
MCAR 0x4980_008C 0x0 R Memory Current Address Register
Watchdog Timer
WTCON 0x53000000 0x0000_8021 W R/W Watchdog timer mode
WTDAT 0x53000004 0x0000_8000 Watchdog timer data
WTCNT 0x53000008 0x0000_8000 Watchdog timer count
IIC
IICCON0 0x54000000 W R/W IIC0 control
IICSTAT0 0x54000004 IIC0 status
IICADD0 0x54000008 IIC0 address
IICDS0 0x5400000C IIC0 data shift
IICLC0 0x54000010 IIC0 multi-master line control
IICCON1 0x54000100 W R/W IIC1 control
IICSTAT1 0x54000104 IIC1 status
IICADD1 0x54000108 IIC1 address
IICDS1 0x5400010C IIC1 data shift
IICLC1 0x54000110 IIC1multi-master line control
IIS Multi Audio Interface
IISCON 0x55000000 0xC600 W R/W IIS control
IISMOD 0x55000004 0x0 IIS mode
I2SFIC 0x55000008 0x0 I2S interface FIFO control register
I2SPSR 0x5500000C 0x0 I2S interface clock divider control register
I2STXD 0x55000010 0x0 W I2S interface transmit data register