User's Manual

S3C2450X RISC MICROPROCESSOR ELECTRICAL DATA
29-27
Table 29-15. IIS Controller Module Signal Timing Constants(I2S Slave Mode Only)
(VDDi = 1.3V± 0.05V (400MHz), VDDi = 1.2 V± 0.05V (533MHz), T
A
= –40 to 85 °C, VDD_OP2 = 3.3V ± 0.3V)
Parameter Symbol Min. Typ. Max Unit
LR Clock Input Delay
T
LRId
0 - ns
Serial Data Setup Time
T
DS
10 - ns
Serial Data Hold Time
T
DH
10 - ns
Table 29-16. IIC BUS Controller Module Signal Timing
(VDDi = 1.3V± 0.05V (400MHz), VDDi = 1.2 V± 0.05V (533MHz), TA = -40 to 85°C, VDD_OP2 = 3.3V ± 0.3V)
Parameter Symbol Min Typ. Max Unit
SCL clock frequency
f
SCL
- - std. 100
fast 400
kHz
SCL high level pulse width
t
SCLHIGH
std. 4.0
fast 0.6
- -
μs
SCL low level pulse width
t
SCLLOW
std. 4.7
fast 1.3
- -
μs
Bus free time between STOP and START
t
BUF
std. 4.7
fast 1.3
- -
μs
START hold time
t
STARTS
std. 4.0
fast 0.6
- -
μs
SDA hold time
t
SDAH
std. 0
fast 0
- std. - fast
0.9
μs
SDA setup time
t
SDAS
std. 250
fast 100
- - ns
STOP setup time
t
STOPH
std. 4.0
fast 0.6
- -
μs
NOTES: Std. means Standard Mode and fast means Fast Mode.
1. The IIC data hold time(tSDAH) is minimum 0ns.
(IIC data hold time is minimum 0ns for standard/fast bus mode in IIC specification v2.1.)
Please check the data hold time of your IIC device if it's 0 nS or not.
2. The IIC controller supports only IIC bus device(standard/fast bus mode), not C bus device.