User's Manual

PRODUCT OVERVIEW S3C2450X RISC MICROPROCESSOR
1-34
Table 1-7. S3C2450 Special Registers
Register Name Address Reset Value
A
cc.
Unit
Read/
Write
Function
DRAM Controller
BANKCFG 0x48000000 0x00099F0D W R/W Mobile DRAM configuration register
BANKCON1 0x48000004 0x00000008 W R/W Mobile DRAM control register
BANKCON2 0x48000008 0x00000008 W R/W Mobile DRAM timing control register
BANKCON3 0x4800000C 0x00000008 W R/W Mobile DRAM (E)MRS Register
REFRESH 0x48000010 0x00000020 W R/W Mobile DRAM refresh control register
TIMEOUT 0x48000014 0x00000000 W R/W Write Buffer Time out control register
MATRIX & EBI
BPRIORITY0 0X4E800000 0x0000_0004 W R/W Matrix Core 0 priority control register
BPRIORITY1 0X4E800004 0x0000_0004 W R/W Matrix Core 1 priority control register
EBICON 0X4E800008 0x0000_0004 W R/W EBI control register
Memory Controllers ( SSMC )
SMBIDCYR0 0x4F000000 0x0000000F W R/W Bank0 idle cycle control register
SMBIDCYR1 0x4F000020 0x0000000F W R/W Bank1 idle cycle control register
SMBIDCYR2 0x4F000040 0x0000000F W R/W Bank2 idle cycle control register
SMBIDCYR3 0x4F000060 0x0000000F W R/W Bank3 idle cycle control register
SMBIDCYR4 0x4F000080 0x0000000F W R/W Bank4 idle cycle control register
SMBIDCYR5 0x4F0000A0 0x0000000F W R/W Bank5 idle cycle control register
SMBWSTRDR0 0x4F000004 0x0000001 W R/W Bank0 read wait state control register
SMBWSTRDR1 0x4F000024 0x0000001F W R/W Bank1 read wait state control register
SMBWSTRDR2 0x4F000044 0x0000001F W R/W Bank2 read wait state control register
SMBWSTRDR3 0x4F000064 0x0000001F W R/W Bank3 read wait state control register
SMBWSTRDR4 0x4F000084 0x0000001F W R/W Bank4 read wait state control register
SMBWSTRDR5 0x4F0000A4 0x0000001F W R/W Bank5 read wait state control register
SMBWSTWRR0 0x4F000008 0x0000001F W R/W Bank0 write wait state control register
SMBWSTWRR1 0x4F000028 0x0000001F W R/W Bank1 write wait state control register
SMBWSTWRR2 0x4F000048 0x0000001F W R/W Bank2 write wait state control register
SMBWSTWRR3 0x4F000068 0x0000001F W R/W Bank3 write wait state control register
SMBWSTWRR4 0x4F000088 0x0000001F W R/W Bank4 write wait state control register
SMBWSTWRR5 0x4F0000A8 0x0000001F W R/W Bank5 write wait state control register
SMBWSTOENR0 0x4F00000C 0x00000002 W R/W Bank0 output enable assertion delay
control register
SMBWSTOENR1 0x4F00002C 0x00000002 W R/W Bank1 output enable assertion delay
control register
SMBWSTOENR2 0x4F00004C 0x00000002 W R/W Bank2 output enable assertion delay
control register