User's Manual

CF CONTROLLER S3C2450X RISC MICROPROCESSOR
8-16
2.7 ATA_CONTROL REGISTER
Register Address R/W Description Reset Value
ATA_CONTROL 0x4B801900 R/W ATA Control register 0x0000_0002
ATA_CONTROL Bits Description R/W Reset Value
Reserved [31:2] Reserved bits R 0x0
clk_down_ready [1] Status for clock down
This bit is asserted in idle state when ATA_CONTROL bit
[0] is zero.
0 = not ready for clock down
1 = ready for clock down
R 0x1
ata_enable [0] ATA enable
0 = ATA is disabled and preparation for clock down
maybe in progress
1 = ATA is enabled.
R/W 0x0
2.8 ATA_STATUS REGISTER
Register Address R/W Description Reset Value
ATA_STATUS 0x4B801904 R ATA Status register 0x0000_0000
ATA_STATUS Bits Description R/W Reset Value
Reserved [31:6] Reserved bits R 0x0
atadev_cblid [5] ATA cable identification R 0x0
atadev_irq [4] ATA interrupt signal line R 0x0
atadev_iordy [3] ATA iordy signal line R 0x0
atadev_dmareq [2] ATA dmareq signal line R 0x0
xfr_state [1:0] Transfer state
2’b00 = Idle state
2’b01 = Transfer state
2’b11 = Wait for completion state
R 0x0