Specifications

4 Message Reference
90
Value
PLL clock source
7
NETREF 1
8
NETREF 2 (CompactPCI only)
The PLL clock is used as the reference when acting as CT Bus Primary Master.
If the clock is to be recovered from one of the line interfaces, the highest-priority in
sync line interface is used as the reference. Each line interface is assigned a priority:
by default liu_id=0 is the highest priority and liu_id=one less than the number of LIUs,
is the lowest. The user may modify the priority order by sending the
MVD_MSG_CLOCK_PRI message.
If none of the interfaces are available for recovery, the phase-locked loop runs in
holdover mode, outputting a clock with the same frequency as the last valid signal.
When a valid signal returns, it waits for a short period to verify that it is stable and
then automatically switches to use it as the clock reference.
If using one of the NETREF signals as the reference source, another board in the
system should be providing this reference by driving a clock source onto the
appropriate CT Bus NETREF lines. If the NETREF signal is lost, the board continues with
the PLL in holdover mode until another MVD_MSG_CNFCLOCK message is sent in to
switch to a new mode.
Note: If the NETREF signal recovers, it is still necessary to reset the clock configuration and move
out of holdover mode by sending a MVD_MSG_CNFCLOCK message and reselecting the
appropriate mode.
ref1_mode
Determines whether the CT Bus NETREF_1 clock is driven onto the CT Bus by the DSI
SS7HD board. The following table shows the permitted values and their meanings.
Value
NETREF_1 clock mode
0
No Change
1
Drive NETREF_1 using clock recovered from highest priority line interface
6
Tristate (that is, not driven)
When the NETREF_1 signal is being driven, the clock source is the highest priority line
interface. If no interface is available for clock recovery, no signal is driven onto the
bus.
Driving the NETREF_1 signal is independent of the clk_mode and pll_clk_src settings
for this board.
ref2_mode
Determines whether the CT Bus NETREF_2 clock (CompactPCI boards only) is driven
onto the CT Bus by this board. The following table shows the permitted values and
their meanings.
Value
NETREF_2 clock mode
0
No change