Specifications

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DSI SPCI Network Interface Boards Programmer's Manual Issue 7
59
event_id
Description
1
PLL entered hold-over mode
Issued by boards acting as primary or secondary clock master when its
nominated clock reference becomes unavailable. The phase-locked-loop
starts operating in “hold-over” mode, continuing to generate an on-board
clock at the same frequency as the last valid reference signal.
2
PLL left hold-over mode
The nominated clock reference for a primary or secondary master board has
become available and the is now being used as the input to the board’s clock
circuitry.
3
CT bus clock set A fail
The CT bus clock set A signals are not being correctly driven.
4
CT bus clock set A recover
The CT bus clock set A signals are being driven.
5
CT bus clock set B fail
The CT bus clock set B signals are not being correctly driven.
6
CT bus clock set B recover
The CT bus clock set B signals are being driven.
7
Master clock changeover
The board issuing this indication has automatically changed from secondary
master to primary master role for the clock set it was configured to drive.
4.4.4 MVD_MSG_LIU_STATUS - LIU Status Indication
Synopsis
Message issued by the board to notify of changes of LIU status.
Format
MESSAGE HEADER
Field Name
Meaning
type
MVD_MSG_LIU_STATUS (0x0e01)
id
liu_id
src
MVD_TASK_ID
dst
MGMT_TASK_ID
rsp_req
0
hclass
0
status
liu_status (see below)
err_info
Reserved for future use.
len
0
Description
This message is issued by the board for every change of state on the trunk interface.
Parameters
liu_id
The identity of the Line Interface Unit to which the status indication applies.