Specifications

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DSI SPCI Network Interface Boards Programmer's Manual Issue 7
53
If using one of the NETREF signals as the reference source, then another board in the
system must be providing this reference by driving a clock source onto the appropriate
CT bus NETREF lines. If the NETREF signal is lost, the board continues with the PLL in
holdover mode until another MVD_MSG_CNFCLOCK message is received to switch to a
new mode.
Note: If the NETREF signal recovers, it is still necessary to re-set the clock configuration and move
out of holdover mode by sending MVD_MSG_CNFCLOCK and re-selecting the appropriate
mode.
ref1_mode
This parameter determines whether the CT bus NETREF_1 clock is driven onto the CT
bus by this board. The permissible values are as follows:
Value
NETREF_1 Clock Mode
0
No Change
1
Drive NETREF_1 using clock recovered from highest priority line
interface.
6
Tri-state (i.e., Not driven)
When the NETREF_1 signal is being driven then the clock source is the highest priority
line interface. If no interface is available for clock recovery, then no signal is driven
onto the bus.
Driving the NETREF_1 signal is independent of the clk_mode and pll_clk_src settings
for this board.
Status Response
The confirmation message (if requested) indicates success by status of zero.
On error, the following status value can be found in the confirmation message.
Value
Mnemonic
Description
0xff
None
Request to configure clocking mode fails.