User's Manual

SC14SPNODE SF DECT Module with integrated Antenna and FLASH
© 2012 Dialog Semiconductor B.V. 13 Jul 1, 2014 v1.6
3.3 OPERATING CONDITIONS
Note 11: Within the specified limits, a life time of 10 years is guaranteed.
Note 12: A life time of 10 years of the CLASS-D amplifier is guaranteed if switched on for 10% of the time.
Note 13: Within this temperature range full operation is guaranteed.
3.4 DIGITAL INPUT/OUTPUT PINS
Note 14: For output drive capability, see section "Pin Description" on page 4.
Table 5: Operating Conditions (Note 11)
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
Vbat Supply voltage on pin VBATIN 2.1 3.45 V
Vdd_pa CLASSD supply voltage on pin VDDPA 2.1 3.45 V
Vpon Voltage on pin PON 5.5 V
Vdig_bp Voltage on digital pins with back drive
protection; ports P0 and P2 (except P2.6)
3.45 V
Vdig Voltage on other digital pins VDD = 1.8 V 1.98 V
Vana Voltage on analog pins AVD = 1.8 V 2.1 V
Icharge Current through pin CHARGE Rseries >
(Vcharge-3 V)/
10 mA
10 mA
Ipa Current through pin PAOUTp, PAOUTn (Note 12) 500 mA
Iout_vrefp Output current through pin VREFp 1 mA
TA Ambient temperature (Note 13) -40 +85 °C
Table 6: Digital input levels
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
Vil_dig Logic 0 input level; all digital
input pins except PON,
CHARGE and RSTn
VDD = 1.8 V 0.3*VDD V
Vil_pon Logic 0 input level; pin PON 0.9 V
Vil_charge Logic 0 input level; pin
CHARGE
0.9 V
Vil_rst Logic 0 input level; pin RSTn VDD = 1.8 V 0.2*VDD V
Vih_dig Logic 1 input level; all digital
input pins except PON,
CHARGE and RSTn
VDD = 1.8 V 0.7*VDD V
Vih_pon Logic 1 input level; pin PON 1.5 V
Vih_charge Logic 1 input level; pin
CHARGE
1.5 V
Vih_rst Logic 1 input level; pin RSTn VDD = 1.8 V 0.8*VDD V
Table 7: Digital output levels
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
Vol_dig Logic 0 output level VDD = 1.8 V; Iout =
2, 4, 8 mA (Note 14)
0.2*VDD V
Voh_dig Logic 1 output level VDD = 1.8 V; Iout =
2, 4, 8 mA (Note 14)
0.8*VDD V