Data Sheet

MediaTek MT7681 Datasheet

QFN40 Pin Name Pin description Default

PU/PD

I/O

Supply

domain

3, 6 RF_V33A RF 3.3V power supply N/A Input

1, 35, 38,

RF_LDO RF power supply N/A Input

34 PLL_LDO PLL power supply N/A Input

E-PAD DVSS Digital ground N/A

Table 1 MT7681 pin descriptions

2.3 Strapping option

Table 2 shows the strapping options for the MT7681.

QFN40 Pin Name Pin description

Default

PU/PD

8 FLMISO XTAL_20_SEL

XTAL is 20MHz: Pull up

XTAL is 40MHz: Pull down

27 GPIO4 EXT_EE_SEL: Pull down PD

25 UART_RX CHIP_MODE[2]: Pull down PD

11 FLCLK CHIP_MODE[1]: Pull up PD

9 FLMOSI CHIP_MODE[0]: Pull down PU

Table 2 Strapping option for the MT7681

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