Datasheet

ICP-10111
Document Number: DS-000177 Page 10 of 31
Revision: 1.3
3.4 I
2
C TIMING CHARACTERIZATION
Default conditions of 25°C and 1.8V supply voltage apply to values in Table 8, unless otherwise stated.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SCL clock frequency
f
SCL
0
-
400
kHz
Hold time (repeated) START condition
t
HD;STA
After this period, the first clock
pulse is generated
0.6
-
-
µs
LOW period of the SCL clock
t
LOW
1.3
-
-
µs
HIGH period of the SCL clock
t
HIGH
0.6
-
-
µs
Set-up time for a repeated START condition
t
SU;STA
0.6
-
-
µs
SDA hold time
t
HD;DAT
0
-
-
µs
SDA set-up time
t
SU;DAT
100
-
-
ns
SCL/SDA rise time
t
R
20
-
300
ns
SCL/SDA fall time
t
F
-
-
300
ns
SDA valid time
t
VD;DAT
-
-
0.9
µs
Set-up time for STOP condition
t
SU;STO
0.6
-
-
µs
Capacitive load on bus line
C
B
-
-
400
pF
Table 8. I
2
C Parameters Specification
Figure 1. Digital I/O Pads Timing
SCL
70
%
30
%
t
LOW
1/f
SC
L
t
HIGH
t
R
t
F
SDA
70
%
30
%
t
SU;D
AT
t
HD;DA
T
DATA IN
t
R
SDA
70
%
30
%
DATA OUT
t
VD;DAT
t
F