Datasheet
1-Wire Signaling
The DS18B20 uses a strict 1-Wire communication pro-
tocol to ensure data integrity. Several signal types are
defined by this protocol: reset pulse, presence pulse, write
0, write 1, read 0, and read 1. The bus master initiates all
these signals, with the exception of the presence pulse.
Initialization Procedure—Reset And
Presence Pulses
All communication with the DS18B20 begins with an ini-
tialization sequence that consists of a reset pulse from the
master followed by a presence pulse from the DS18B20.
This is illustrated in Figure 15. When the DS18B20 sends
the presence pulse in response to the reset, it is indicating
to the master that it is on the bus and ready to operate.
During the initialization sequence the bus master trans-
mits (T
X
) the reset pulse by pulling the 1-Wire bus low
for a minimum of 480µs. The bus master then releases
the bus and goes into receive mode (R
X
). When the bus
is released, the 5kΩ pullup resistor pulls the 1-Wire bus
high. When the DS18B20 detects this rising edge, it waits
15µs to 60µs and then transmits a presence pulse by pull-
ing the 1-Wire bus low for 60µs to 240µs.
Read/Write Time Slots
The bus master writes data to the DS18B20 during write
time slots and reads data from the DS18B20 during read
time slots. One bit of data is transmitted over the 1-Wire
bus per time slot.
Write Time Slots
There are two types of write time slots: “Write 1” time slots
and “Write 0” time slots. The bus master uses a Write 1
time slot to write a logic 1 to the DS18B20 and a Write
0 time slot to write a logic 0 to the DS18B20. All write
time slots must be a minimum of 60µs in duration with a
minimum of a 1µs recovery time between individual write
slots. Both types of write time slots are initiated by the
master pulling the 1-Wire bus low (see Figure 14).
To generate a Write 1 time slot, after pulling the 1-Wire
bus low, the bus master must release the 1-Wire bus
within 15µs. When the bus is released, the 5kΩ pullup
resistor will pull the bus high. To generate a Write 0 time
slot, after pulling the 1-Wire bus low, the bus master must
continue to hold the bus low for the duration of the time
slot (at least 60µs).
The DS18B20 samples the 1-Wire bus during a window
that lasts from 15µs to 60µs after the master initiates the
write time slot. If the bus is high during the sampling win-
dow, a 1 is written to the DS18B20. If the line is low, a 0
is written to the DS18B20.
Figure 15. Initialization Timing
LINE TYPE LEGEND
DS18B20 PULLING LOW
RESISTOR PULLUP
MASTER Tx RESET PULSE
480µs MINIMUM
MASTER Rx
480µs MINIMUM
DS18B20
WAITS 15-60µs
V
PU
1-Wire BUS
GND
DS18B20 TX PRESENCE
PULSE 60-240µS
BUS MASTER PULLING LOW
DS18B20 Programmable Resolution
1-Wire Digital Thermometer
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