Fermion TMF8801 ToF Distance Ranging Sensor (20-2500mm) - Datasheet
Table Of Contents
- Content Guide
- 1 General Description
- 2 Ordering Information
- 3 TMF8801 Module Description
- 4 Absolute Maximum Ratings
- 5 Electrical Characteristics
- 6 Typical Operating Characteristics
- 7 Functional Description
- 8 Register Description
- 8.1 APPID Register (Address 0x00)
- 8.2 APPREV_MAJOR Register (Address 0x01)
- 8.3 APPREQID Register (Address 0x02)
- 8.4 ENABLE Register (Address 0xE0)
- 8.5 INT_STATUS Register (Address 0xE1)
- 8.6 INT_ENAB Register (Address 0xE2)
- 8.7 ID Register (Address 0xE3)
- 8.8 REVID Register (Address 0xE4)
- 8.9 App0 Registers – appid=0xC0
- 8.9.1 CMD_DATA9 Register (Address 0x06)
- 8.9.2 CMD_DATA8 Register (Address 0x07)
- 8.9.3 CMD_DATA7 Register (Address 0x08)
- 8.9.4 CMD_DATA6 Register (Address 0x09)
- 8.9.5 CMD_DATA5 Register (Address 0x0A)
- 8.9.6 CMD_DATA4 Register (Address 0x0B)
- 8.9.7 CMD_DATA3 Register (Address 0x0C)
- 8.9.8 CMD_DATA2 Register (Address 0x0D)
- 8.9.9 CMD_DATA1 Register (Address 0x0E)
- 8.9.10 CMD_DATA0 Register (Address 0x0F)
- 8.9.11 COMMAND Register (Address 0x10)
- 8.9.12 PREVIOUS Register (Address 0x11)
- 8.9.13 APPREV_MINOR Register (Address 0x12)
- 8.9.14 APPREV_PATCH Register (Address 0x13)
- 8.9.15 STATUS Register (Address 0x1D)
- 8.9.16 REGISTER_CONTENTS Register (Address 0x1E)
- 8.9.17 TID Register (Address 0x1F)
- 8.9.18 Object Detection Results – If Register register_contents = 0x55 (commands 0x02, 0x03 or 0x04)
- RESULT_NUMBER Register (Address 0x20)
- RESULT_INFO Register (Address 0x21)
- DISTANCE_PEAK_0 Register (Address 0x22)
- DISTANCE_PEAK_1 Register (Address 0x23)
- SYS_CLOCK_0 Register (Address 0x24)
- SYS_CLOCK_1 Register (Address 0x25)
- SYS_CLOCK_2 Register (Address 0x26)
- SYS_CLOCK_3 Register (Address 0x27)
- STATE_DATA_0 Register (Address 0x28)
- STATE_DATA_1 Register (Address 0x29)
- STATE_DATA_2 Register (Address 0x2A)
- STATE_DATA_3 Register (Address 0x2B)
- STATE_DATA_4 Register (Address 0x2C)
- STATE_DATA_5 Register (Address 0x2D)
- STATE_DATA_6 Register (Address 0x2E)
- STATE_DATA_7 Register (Address 0x2F)
- STATE_DATA_8_XTALK_MSB Register (Address 0x30)
- STATE_DATA_9_XTALK_LSB Register (Address 0x31)
- STATE_DATA_10_TJ Register (Address 0x32)
- REFERENCE_HITS_0 Register (Address 0x33)
- REFERENCE_HITS_1 Register (Address 0x34)
- REFERENCE_HITS_2 Register (Address 0x35)
- REFERENCE_HITS_3 Register (Address 0x36)
- OBJECT_HITS_0 Register (Address 0x37)
- OBJECT_HITS_1 Register (Address 0x38)
- OBJECT_HITS_2 Register (Address 0x39)
- OBJECT_HITS_3 Register (Address 0x3A)
- 8.9.19 Calibration and Algorithm State Data Exchange
- FACTORY_CALIB_0 Register (Address 0x20)
- FACTORY_CALIB_1 Register (Address 0x21)
- FACTORY_CALIB_2 Register (Address 0x22)
- FACTORY_CALIB_3 Register (Address 0x23)
- FACTORY_CALIB_4 Register (Address 0x24)
- FACTORY_CALIB_5 Register (Address 0x25)
- FACTORY_CALIB_6 Register (Address 0x26)
- FACTORY_CALIB_7 Register (Address 0x27)
- FACTORY_CALIB_8 Register (Address 0x28)
- FACTORY_CALIB_9 Register (Address 0x29)
- FACTORY_CALIB_10 Register (Address 0x2A)
- FACTORY_CALIB_11 Register (Address 0x2B)
- FACTORY_CALIB_12 Register (Address 0x2C)
- FACTORY_CALIB_13 Register (Address 0x2D)
- STATE_DATA_WR_0 Register (Address 0x2E)
- STATE_DATA_WR_1 Register (Address 0x2F)
- STATE_DATA_WR_2 Register (Address 0x30)
- STATE_DATA_WR_3 Register (Address 0x31)
- STATE_DATA_WR_4 Register (Address 0x32)
- STATE_DATA_WR_5 Register (Address 0x33)
- STATE_DATA_WR_6 Register (Address 0x34)
- STATE_DATA_WR_7 Register (Address 0x35)
- STATE_DATA_WR_8 Register (Address 0x36)
- STATE_DATA_WR_9 Register (Address 0x37)
- STATE_DATA_WR_10 Register (Address 0x38)
- 8.9.20 Raw Histogram Output – If Register register_contents=0x80…0x93
- 8.9.21 Serial Number Readout – If Register register_contents=0x47
- 8.10 Bootloader Registers – appid=0x80
- 9 Application Information
- 10 Package Drawings & Markings
- 11 Tape & Reel Information
- 12 Soldering & Storage Information
- 13 Laser Eye Safety
- 14 Revision Information
- 15 Legal Information
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TMF8801
Register Description
Datasheet • PUBLIC
DS000648 • v8-00 • 2021-Jul-08
69 │ 22
8.4 ENABLE Register (Address 0xE0)
Figure 24:
ENABLE Register
Addr: 0xE0
ENABLE
Field
Name
Rst
Type
Description
7
cpu_reset
0
RW_SC
Write a '1' here to reset CPU. This generates global
reset, fully resetting CPU and all CPU registers. The bit
resets itself, no need to explicitly clear it.
6
cpu_ready
0
RO
CPU is ready to handle I²C - if this bit is zero, then only
the registers 0xe0 and above are usable, the memory
mapped I²C space is not used.
Bit gets set only explicitly by software, therefore a
functional and running firmware is necessary for this bit
to work.
0
pon
1
R_PUSH
1=Activate oscillator 0=Ask cpu to go to standby
Activating the oscillator is implemented in hardware.
Whenever this register is '0' and a '1' is being written,
the oscillator is being started and CPU receives a
PON1 interrupt. It is implemented in the bootloader to
execute a reset at this point, but the application goes to
an IDLE state.
De-activating the oscillator is a software assisted
process. It is important that the CPU powers down all
modules properly before turning off the oscillator,
therefore this is implemented in firmware. So writing a
'0' to this register will trigger an internal CPU interrupt.
The firmware, after powering down everything, sets the
device into standby state.
8.5 INT_STATUS Register (Address 0xE1)
Figure 25:
INT_STATUS Register
Addr: 0xE1
INT_STATUS
Field
Name
Rst
Type
Description
1
int2
0
R_PUSH1
Raw histogram available interrupt for App0; asserted
when a raw histogram can be retrieved from I²C.
int2 status. If bis is asserted, and int2_enab is asserted
as well, then the INT pin will be pulled low. Writing a '1'
here will clear int1 condition.