Datasheet
Table Of Contents
- General Description
- Pin Assignments
- Absolute Maximum Ratings
- Electrical Characteristics
- Typical Operating Characteristics
- Detailed Description
- Register Description
- Application Information
- Package Information
- Tape & Reel Information
- Soldering & Storage Information
- Laser Eye Safety
- Ordering & Contact Information
- RoHS Compliant & ams Green Statement
- Copyrights & Disclaimer
- Document Status
- Revision Information
- Content Guide
Page 20 ams Datasheet
Document Feedback [v1-08] 2020-Jun-29
TMF8701 − Register Description
Figure 26:
INT_ENAB Register
Figure 27:
ID Register
Figure 28:
REVID Register
0xe2: INT_ENAB
Field Name Reset Type Description
1int2_enab 0 RW
Raw histogram available interrupt for App0; asserted
when a raw histogram can be retrieved from I²C.
0 = Disabled, 1 = Enabled -> INT output is active if int2 flag
is "1"
0int1_enab 0 RW
Object detection interrupt for App0; asserted when a
result from object detection is available
0 = Disabled, 1 = Enabled -> INT output is active if int1 flag
is "1"
0xe3: ID
Field Name Reset Type Description
5:0 id 0 RO
Chip ID, reads 07h – Do not rely on register bits 6 and 7
of this register.
0xe4: REVID
Field Name Reset Type Description
2:0 rev_id 0 RO Chip revision ID