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Single-Lead, Heart Rate Monitor Front End

Data Sheet

AD8232

Rev. A Document Feedback

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FEATURES

Fully integrated single-lead ECG front end

Low supply current: 170 µA (typical)

Common-mode rejection ratio: 80 dB (dc to 60 Hz)

Two or three electrode configurations

High signal gain (G = 100) with dc blocking capabilities

2-pole adjustable high-pass filter

Accepts up to ±300 mV of half cell potential

Fast restore feature improves filter settling

Uncommitted op amp

3-pole adjustable low-pass filter with adjustable gain

Leads off detection: ac or dc options

Integrated right leg drive (RLD) amplifier

Single-supply operation: 2.0 V to 3.5 V

Integrated reference buffer generates virtual ground

Rail-to-rail output

Internal RFI filter

8 kV HBM ESD rating

Shutdown pin

20-lead 4 mm × 4 mm LFCSP package

APPLICATIONS

Fitness and activity heart rate monitors

Portable ECG

Remote health monitors

Gaming peripherals

Biopotential signal acquisition

FUNCTIONAL BLOCK DIAGRAM

Figure 1.

GENERAL DESCRIPTION

The AD8232 is an integrated signal conditioning block for ECG

and other biopotential measurement applications. It is designed

to extract, amplify, and filter small biopotential signals in the

presence of noisy conditions, such as those created by motion or

remote electrode placement. This design allows for an ultralow

power analog-to-digital converter (ADC) or an embedded

microcontroller to acquire the output signal easily.

The AD8232 can implement a two-pole high-pass filter for

eliminating motion artifacts and the electrode half-cell potential.

This filter is tightly coupled with the instrumentation architec-

ture of the amplifier to allow both large gain and high-pass

filtering in a single stage, thereby saving space and cost.

An uncommitted operational amplifier enables the AD8232 to

create a three-pole low-pass filter to remove additional noise.

The user can select the frequency cutoff of all filters to suit

different types of applications.

To improve common-mode rejection of the line frequencies

in the system and other undesired interferences, the AD8232

includes an amplifier for driven lead applications, such as right

leg drive (RLD).

The AD8232 includes a fast restore function that reduces the

duration of otherwise long settling tails of the high-pass filters.

After an abrupt signal change that rails the amplifier (such as a

leads off condition), the AD8232 automatically adjusts to a

higher filter cutoff. This feature allows the AD8232 to recover

quickly, and therefore, to take valid measurements soon after

connecting the electrodes to the subject.

The AD8232 is available in a 4 mm × 4 mm, 20-lead LFCSP

package. Performance is specified from 0°C to 70°C and is

operational from −40°C to +85°C.

LOD–

LOD+

AD8232

GND

OUT

OPAMP–REFOUTOP

AMP+SW

REFINIAOUT

HPSENSE

HPDRIVE

+IN

–IN

RLD

RLDFB

SDN

AC/DC

LEADS-OFF

DETECTION

10kΩ

150kΩ

19 18 17 16

6 7 8

10866-001

Summary of content (28 pages)

PAGE 1
FEATURES FUNCTIONAL BLOCK DIAGRAM Fully integrated single-lead ECG front end Low supply current: 170 µA (typical) Common-mode rejection ratio: 80 dB (dc to 60 Hz) Two or three electrode configurations High signal gain (G = 100) with dc blocking capabilities 2-pole adjustable high-pass filter Accepts up to ±300 mV of half cell potential Fast restore feature improves filter settling Uncommitted op amp 3-pole adjustable low-pass filter with adjustable gain Leads off detection: ac or dc options Integrated rig
PAGE 2
AD8232 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Standby Operation ..................................................................... 19 Applications ....................................................................................... 1 Input Protection ......................................................................... 19 Functional Block Diagram ...................................................
PAGE 3
Data Sheet AD8232 SPECIFICATIONS VS = 3 V, VREF = 1.5 V, VCM = 1.5 V, TA = 25°C, FR=low, SDN=high, AC/DC = low, unless otherwise noted. Table 1. Parameter INSTRUMENTATION AMPLIFIER Common-Mode Rejection Ratio, DC to 60 Hz Power Supply Rejection Ratio Offset Voltage (RTI) Instrumentation Amplifier Inputs DC Blocking Input 1 Average Offset Drift Instrumentation Amplifier Inputs DC Blocking Input1 Input Bias Current Symbol Test Conditions/Comments Min Typ CMRR VCM = 0.35 V to 2.
PAGE 4
AD8232 Parameter RIGHT LEG DRIVE AMPLIFIER (A2) Output Swing Short-Circuit Current Integrator Input Resistor Gain Bandwidth Product REFERENCE BUFFER (A3) Offset Error Input Bias Current Short-Circuit Current Limit Voltage Range DC LEADS OFF COMPARATORS Threshold Voltage Hysteresis Propagation Delay AC LEADS OFF DETECTOR Square Wave Frequency Square Wave Amplitude Impedance Threshold Detection Delay FAST RESTORE CIRCUIT Switches On Resistance Off Leakage Window Comparator Threshold Voltage Propagation Delay
PAGE 5
Data Sheet AD8232 ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2.
PAGE 6
AD8232 Data Sheet 20 19 18 17 16 HPSENSE IAOUT REFIN +VS GND PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 AD8232 TOP VIEW 15 14 13 12 11 FR AC/DC SDN LOD+ LOD– NOTES 1. CONNECT THE EXPOSED PAD TO GND OR LEAVE UNCONNECTED. 10866-002 SW 6 OPAMP+ 7 REFOUT 8 OPAMP– 9 OUT 10 HPDRIVE +IN –IN RLDFB RLD Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No.
PAGE 7
Data Sheet AD8232 TYPICAL PERFORMANCE CHARACTERISTICS VS = 3 V, VREF = 1.5 V, VCM = 1.5 V, TA = 25°C, unless otherwise noted. INSTRUMENTATION AMPLIFIER PERFORMANCE CURVES 1200 50 40 1000 INPUT BIAS CURRENT (pA) 30 UNITS 800 600 400 20 10 0 –10 –20 –30 200 –90 –60 –30 0 30 60 90 120 CMRR (µV/V) –50 10866-003 0 –120 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 INPUT COMMON-MODE VOLTAGE (V) Figure 3. Instrumentation Amplifier CMRR Distribution 10866-006 –40 Figure 6.
PAGE 8
AD8232 Data Sheet 120 110 100 PSRR (dB) 90 10µV/DIV 80 70 60 50 30 10866-012 40 1 10 100 1k 10k 100k FREQUENCY (Hz) 10866-009 200ms/DIV 20 0.1 Figure 9. Instrumentation Amplifier PSRR vs. Frequency Figure 12. Instrumentation Amplifier 0.5 Hz to 40 Hz Noise 10k 1.0 0.9 0.7 1k GAIN ERROR (%) NOISE (nV/√Hz) 0.8 100 0.6 0.5 0.4 0.3 0.2 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 10.
PAGE 9
Data Sheet AD8232 0.7 3.0 0.6 2.5 0.5 2.0 0.4 1.5 0.3 1.0 0.2 0.5 0.1 0 10866-015 100µs/DIV 0 –0.5 –0.1 –1.0 –40 –20 –0 20 40 60 80 –0.2 100 10866-018 INPUT BIAS CURRENT (nA) 3.5 0.5V/DIV 0.8 IB IOS INPUT OFFSET CURRENT (nA) 4.0 TEMPERATURE (°C) Figure 15. Instrumentation Amplifier Large Signal Pulse Response Figure 18. Instrumentation Amplifier Input Bias Current and Input Offset Current vs. Temperature 1.5 0.5 0.4 0.3 0.2 GAIN ERROR (%) 0.5 0 –0.5 0 –0.1 –0.
PAGE 10
AD8232 Data Sheet OPERATIONAL AMPLIFIER PERFORMANCE CURVES 1000 800 UNITS 600 400 0.5V/DIV –2 0 2 4 OFFSET VOLTAGE (mV) Figure 21. Operational Amplifier Offset Distribution 140 80 120 60 100 40 80 20 60 0 40 –20 20 1 10 100 1k 10k 100k 0 1M FREQUENCY (Hz) Figure 22. Operational Amplifier Open-Loop Gain and Phase vs. Frequency NOISE (nV/√Hz) 100 –40 0.1 10k 1k 100 10 0.1 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 25.
PAGE 11
Data Sheet AD8232 120 110 100 90 80 PSRR (dB) 5µV/DIV 70 60 50 40 30 10866-027 20 10 0 0.1 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 27. Operational Amplifier 0.5 Hz to 40 Hz Noise 10866-030 200ms/DIV Figure 30. Operational Amplifier Power Supply Rejection Ratio 100 80 INPUT BIAS CURRENT (pA) 60 40 20 0 –20 –40 –60 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 INPUT COMMON-MODE VOLTAGE (V) 10866-028 –100 10866-031 20V/DIV 10µV/DIV –80 Figure 31.
PAGE 12
AD8232 Data Sheet 1,000 100 10 1 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) 10866-033 INPUT BIAS CURRENT (pA) 10,000 Figure 33. Operational Amplifier Bias Current vs. Temperature Rev.
PAGE 13
Data Sheet AD8232 RIGHT LEG DRIVE (RLD) AMPLIFIER PERFORMANCE CURVES 160 100 140 80 120 60 100 40 80 20 60 0 40 –20 20 5µV/DIV 1s/DIV 0.1 1 10 100 1k 10k 100k 0 1M 10866-034 –40 0.01 10866-037 120 OPEN-LOOP GAIN (dB) 180 GAIN PHASE PHASE (Degrees) 140 FREQUENCY (Hz) Figure 37. RLD Amplifier 0.1 Hz to 10 Hz Noise Figure 34. RLD Amplifier Open-Loop Gain and Phase vs. Frequency 1.5 5µV/DIV 0.5 0 –40°C +25°C +85°C –1.0 –1.
PAGE 14
AD8232 Data Sheet REFERENCE BUFFER PERFORMANCE CURVES 20 15 10,000.0 SOURCE SINK 1,000.0 OUTPUT IMPEDANCE (Ω) 5 0 –5 –10 100.0 10.0 1.0 0.10 1 10 LOAD CURRENT (mA) 0.1 0.1 10866-039 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 39. Reference Buffer Load Regulation Figure 41. Reference Buffer Output Impedance vs. Frequency 1000 INPUT BIAS CURRENT (pA) 20mV/DIV 10µs/DIV 100 10 1 –40 –20 0 20 40 60 80 TEMPERATURE (°C) Figure 40.
PAGE 15
Data Sheet AD8232 SYSTEM PERFORMANCE CURVES 240 200 180 220 VS = 2V VS = 3V VS = 3.5V SHUTDOWN CURRENT (nA) 180 160 140 140 120 100 80 60 40 VS = 2V VS = 3V VS = 3.5V 100 –40 –20 0 20 40 60 80 TEMPERATURE (°C) 20 100 0 –40 –20 0 20 40 60 80 TEMPERATURE (°C) Figure 44. Shutdown Current vs. Temperature Figure 43. Supply Current vs. Temperature Rev.
PAGE 16
AD8232 Data Sheet THEORY OF OPERATION +VS HPDRIVE HPSENSE IAOUT SW 17 1 20 19 6 OPAMP– 7 9 10kΩ CHARGE PUMP +VS OPAMP+ A1 10 OUT S2 AC/DC –IN 2 RFI FILTER +IN 3 HPA GM1 GM2 VCM AC/DC S1 R 10kΩ 15 FR +VS – 0.05V 99R 13 SDN C1 0.05V 14 AC/DC INSTRUMENTATION AMPLIFIER (IA) S1 S2 SYNCH RECTIFIER RLDFB 4 SWITCH TIMING 12 LOD+ 0.7V 11 LOD– RLD 5 A2 +VS – 0.
PAGE 17
Data Sheet AD8232 The right leg drive (RLD) amplifier inverts the common-mode signal that is present at the instrumentation amplifier inputs. When the right leg drive output current is injected into the subject, it counteracts common-mode voltage variations, thus improving the common-mode rejection of the system. The common-mode signal that is present across the inputs of the instrumentation amplifier is derived from the transconductance amplifier, GM1.
PAGE 18
AD8232 Data Sheet SATURATION DETECTED NO SATURATION tS1 S1 tS2 S2 10866-048 tRST LEADS OFF LEADS ON Figure 49. Timing Diagram for Fast Restore Switches (Time Base Not to Scale) These two switches (S1 and S2) enable two different 10 kΩ resistor paths: one between HPSENSE and IAOUT and another between SW and REFOUT. During the time Switch S1 and Switch S2 are enabled, these internal resistors appear in parallel with their corresponding external resistors forming high-pass filters.
PAGE 19
Data Sheet AD8232 AC Leads Off Detection The ac leads off detection mode is useful when using two electrodes only (it does not require the use of a driven electrode). In this case, a conduction path must exist between the two electrodes, which is usually formed by two resistors, as shown in Figure 51. These resistors also provide a path for bias return on each input. Connect each resistor to REFOUT or RLD to maintain the inputs within the common-mode range of the instrumentation amplifier.
PAGE 20
AD8232 Data Sheet RADIO FREQUENCY INTERFERENCE (RFI) INPUT REFERRED OFFSETS Radio frequency (RF) rectification is often a problem in applications where there are large RF signals. The problem appears as a dc offset voltage at the output. The AD8232 has a 15 pF gate capacitance and 10 kΩ resistors at each input. This forms a low-pass filter on each input that reduces rectification at high frequency (see Figure 53) without the addition of external elements.
PAGE 21
Data Sheet AD8232 APPLICATIONS INFORMATION ELIMINATING ELECTRODE OFFSETS The instrumentation amplifier in the AD8232 is designed to apply gain and to filter out near dc signals simultaneously. This capability allows it to amplify a small ECG signal by a factor of 100 yet reject electrode offsets as large as ±300 mV. To achieve offset rejection, connect an RC network between the output of the instrumentation amplifier, HPSENSE, and HPDRIVE, as shown in Figure 53.
PAGE 22
AD8232 Data Sheet Additional High-Pass Filtering Options In addition to the topologies explained in the previous sections, an additional pole may be added to the dc blocking circuit for additional rejection of low frequency signals. This configuration is shown in Figure 56. R1 TO NEXT STAGE R2 C1 R1 RCOMP RCOMP 20 IAOUT HPA +IN S1 10kΩ 1 6 19 HPSENSE HPDRIVE SW 10kΩ HPA +IN S2 SW 10kΩ S1 10kΩ C2 R3 S2 2 3 REFOUT 8 10866-155 = REFOUT REFOUT 8 –IN –IN = REFOUT Figure 57.
PAGE 23
Data Sheet AD8232 LOW-PASS FILTERING AND GAIN The AD8232 includes an uncommitted op amp that can be used for extra gain and filtering. For applications that do not require a high-order filter, a simple RC low-pass filter should suffice, and the op amp can buffer or further amplify the signal. FROM IN-AMP STAGE R A1 To connect these two filtering stages properly without a buffer, make the value of R1 at least ten times larger than the resistor of the ac coupling network (labeled as R2 in Figure 55).
PAGE 24
AD8232 Data Sheet APPLICATION CIRCUITS HEART RATE MEASUREMENT NEXT TO THE HEART For wearable exercise devices, the AD8232 is typically placed in a pod near the heart. The two sense electrodes are placed underneath the pectoral muscles; no driven electrode is used. Because the distance from the heart to the AD8232 is small, the heart signal is strong and there is less muscle artifact interference. In this configuration, space is at a premium.
PAGE 25
Data Sheet AD8232 The overall narrow-band nature of this filter combination distorts the ECG waveform significantly. Therefore, it is only suitable to determine the heart rate, and not to analyze the ECG signal characteristics. The low-pass filter stage also includes a gain of 11, to bring the total system gain close to 1100 (note that the filter roll off prevents the maximum gain from reaching this value).
PAGE 26
AD8232 Data Sheet +VS 4.7µF 10MΩ LA ELECTRODE INTERFACE 180kΩ RA 4.7µF 360kΩ RL HPDRIVE +IN 100kΩ 332kΩ 2.7nF 1MΩ REFIN –IN +VS 1nF 10MΩ ADP150x-2.8 VOUT IAOUT RLDFB 1µF 10MΩ VIN 1µF GND VBATT 0.1µF 0.1µF GND RLD 1MΩ +VS = +2.8V 10MΩ +VS SW 1MΩ HPSENSE AD8232 FR OPAMP+ AC/DC REFOUT SDN +VS ADXL346 ADuCM360 6.8nF P1.2 P0.6/IRQ2 P1.7/CS0 OPAMP– LO+ P1.1 OUT LO– P1.0 INT2 VS CS P1.6/MOSI0 SDO/ALT_ADD P1.4/MISO0 SDA/SDI/SDIO P1.
PAGE 27
Data Sheet AD8232 PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS PIN 1 INDICATOR 4.10 4.00 SQ 3.90 0.30 0.25 0.20 0.50 BSC 20 16 15 PIN 1 INDICATOR 1 EXPOSED PAD 2.65 2.50 SQ 2.35 5 11 0.80 0.75 0.70 0.50 0.40 0.30 10 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 6 0.25 MIN BOTTOM VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WGGD.
PAGE 28
AD8232 Data Sheet NOTES ©2012–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10866-0-2/13(A) www.analog.com/AD8232 Rev.