Datasheet

ST7735
V1.7 21 2009-12-04
8 Timing chart
8.1 Parallel interface characteristics: 18, 16, 9 or 8-bit bus (8080 series MCU interface)
Fig. 8.1.1 Parallel interface timing characteristics (8080 series MCU interface)
Signal Symbol Parameter Min
Max
Unit
Description
TAST Address setup time 10 ns
D/CX
TAHT Address hold time (Write/Read) 10 ns
-
TCHW Chip select “H” pulse width 0 ns
TCS Chip select setup time (Write) 15 ns
TRCS Chip select setup time (Read ID) 45 ns
TRCSFM
Chip select setup time (Read FM)
350
ns
TCSF Chip select wait time (Write/Read)
10 ns
CSX
TCSH Chip select hold time 10 ns
-
TWC Write cycle 100
ns
TWRH Control pulse “H” duration 30 ns
WRX
TWRL Control pulse “L” duration 30 ns
TRC Read cycle (ID) 160
ns
TRDH Control pulse “H” duration (ID) 90 ns
RDX (ID)
TRDL Control pulse “L” duration (ID) 45 ns
When read ID data
TRCFM Read cycle (FM) 450
ns
TRDHFM
Control pulse “H” duration (FM) 150
ns
RDX
(FM)
TRDLFM
Control pulse “L” duration (FM) 150
ns
When read from frame
memory