Datasheet

ManualsBrandsDFRobot ManualsLCD & Display0.96 inch 160x80 Color SPI TFT Display

Sitronix

ST7735

262K Color Single-Chip TFT Controller/Driver

V1.7 1 2009-12-04

1 Introduction

The ST7735 is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 396 source line and 162

gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts Serial

Peripheral Interface (SPI), 8-bit/9-bit/16-bit/18-bit parallel interface. Display data can be stored in the on-chip display data

RAM of 132 x 162 x 18 bits. It can perform display data RAM read/write operation with no external operation clock to

minimize power consumption. In addition, because of the integrated power supply circuits necessary to drive liquid crystal,

it is possible to make a display system with fewer components.

2 Features

Single chip TFT-LCD Controller/Driver with RAM

On-chip Display Data RAM (i.e. Frame Memory)

-132 (H) x RGB x 162 (V) bits

LCD Driver Output Circuits:

-Source Outputs: 132 RGB channels

-Gate Outputs: 162 channels

-Common electrode output

Display Resolution

-132 (RGB) x 162

(GM[2:0]= ”000”, DDRAM: 132 x 18-bits x 162)

-128 (RGB) x 160

(GM[2:0]= ”011”, DDRAM: 128 x 18-bits x 160)

Display Colors (Color Mode)

-Full Color: 262K, RGB=(666) max., Idle Mode OFF

-Color Reduce: 8-color, RGB=(111), Idle Mode ON

Programmable Pixel Color Format (Color Depth) for

Various Display Data input Format

-12-bit/pixel: RGB=(444) using the 384k-bit frame

memory and LUT

-16-bit/pixel: RGB=(565) using the 384k-bit frame

memory and LUT

-18-bit/pixel: RGB=(666) using the 384k-bit frame

memory and LUT

Various Interfaces

-Parallel 8080-series MCU Interface

(8-bit, 9-bit, 16-bit & 18-bit)

-3-line serial interface

-4-line serial interface

Display Features

-Programmable partial display duty

-Line inversion, frame inversion

-Support both normal-black & normal-white LC

-Software programmable color depth mode

Built-in Circuits

-DC/DC converter

-Adjustable VCOM generation

-Non-volatile (NV) memory to store initial register setting

-Oscillator for display clock generation

-Factory default value (module ID, module version, etc)

are stored in NV memory

-Timing controller

Built-in NV Memory for LCD Initial Register Setting

-7-bits for ID2

-8-bits for ID3

-7-bits for VCOM adjustment

Wide Supply Voltage Range

-I/O Voltage (VDDI to DGND): 1.65V~VDD

(VDDI ≤ VDD)

-Analog Voltage (VDD to AGND): 2.6V~3.3V

On-Chip Power System

-Source Voltage (GVDD to AGND): 3.0V~5.0V

-VCOM HIGH level (VCOMH to AGND): 2.5V to 5.0V

-VCOM LOW level (VCOML to AGND): -2.4V to 0.0V

-Gate driver HIGH level (VGH to AGND):

+10.0V to +15V

-Gate driver LOW level (VGL to AGND):

-12.4V to -7.5V

Operating Temperature: -30°C to +85°C

ST7735

Parallel Interface: 8-bit/9-bit/16-bit/18-bit

Serial Interface: 3-line/4-line

Sitronix Technology Corp. reserves the right to change the contents in this document without prior notice.

Summary of content (166 pages)

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ST Sitronix ST7735 262K Color Single-Chip TFT Controller/Driver 1 Introduction The ST7735 is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 396 source line and 162 gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts Serial Peripheral Interface (SPI), 8-bit/9-bit/16-bit/18-bit parallel interface. Display data can be stored in the on-chip display data RAM of 132 x 162 x 18 bits.
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ST7735 3 Pad arrangement 3.1 Output Bump Dimension Boundary (Include scribe Lane) C L K H J A V1.
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ST7735 3.2 Input Bump Dimension C2 C2 A1 A2 C1 H K K2 K1 K1 L Boundary (Include scribe Lane) V1.
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ST7735 3.3 Alignment Mark Dimension 10 5 5 10 80 15 15 15 15 20 20 15 15 15 15 80 15 15 20 15 15 15 15 80 20 15 15 80 3.4 Chip Information Chip size (um x um): 9900 x 670 PAD coordinate: pad center Coordinate origin: chip center Chip thickness (um): 300 (TYP) Bump height (um): 15 (TYP) Bump hardness (HV): 75 (TYP) V1.
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ST7735 4 Pad Center Coordinates No. PAD Name X Y No. PAD Name X Y No.
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ST7735 No. PAD Name X Y No. PAD Name X Y No.
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ST7735 No. PAD Name X Y No. PAD Name X Y No.
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ST7735 No. PAD Name X Y No. PAD Name X Y No.
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ST7735 No. PAD Name X Y No. PAD Name X Y No.
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ST7735 No. PAD Name X Y 751 752 753 754 755 756 757 758 759 G149 G151 G153 G155 G157 G159 G161 DUMMY DUMMY -4644 -4660 -4676 -4692 -4708 -4724 -4740 -4756 -4772 110 227 110 227 110 227 110 227 110 ALK-R ALK-L 4841 -4841 -220 -220 V1.
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ST7735 Block diagram GVDD 5 162 Gate buffer Voltage reference 396 Source buffer Level shifter DAC Gamma circuit Gate decoder Level Shifter VCOMH Data Latch Gamma Table Vcom generator VCOM VCOML Display Ram 132 x 162 x 18bits Display control Color conversion LUT table OSC C11P Instruction register EEPROM C11N C41P Booster 1/2/4 C41N C22P C22N C23P MCU IF VDD VDDI AVDD VCL VGH VGL SMY SMX EXTC 11 IM [2:0] DC/X (SCL) CSX RDX (E) WRX (R/WX) GS SRGB LCM SDA D[17:0] V1.
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ST7735 6 Driver IC Pin Description 6.1 Power Supply Pin Name I/O Description Connect pin VDD I Power supply for analog, digital system and booster circuit. VDD VDDI I Power supply for I/O system. VDDI AGND I System ground for analog system and booster circuit. GND DGND I System ground for I/O system and digital system. GND Description Connect pin 6.
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ST7735 -D0 is the serial input/output signal in serial interface mode. -In serial interface, D[17:1] are not used and should be fixed at VDDI or DGND level. -Tearing effect output pin to synchronies MCU to frame rate, activated TE O by S/W command. MCU -If not used, please open this pin. -Monitoring pin of internal oscillator clock and is turned ON/OFF by OSC O S/W command. -When this pin is inactive (function OFF), this pin is DGND level. - -If not used, please open this pin. Note1.
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ST7735 6.3 Mode selection pin Name I/O Description Connect pin -During normal operation, please open this pin EXTC I EXTC Enable/disable modification of extend command 0 System function command list can be used. 1 All command list can be used. Open -Panel resolution selection pins.
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ST7735 Input pin to select horizontal line number in TE signal. TESEL I This pin is only for GM[2:0]=’000’ mode VDDI/DGND TESEL=’0’ , TE output 162 lines TESEL=’1’ , TE output 160 lines V1.
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ST7735 6.4 Driver output pins Name I/O Description S1 to S396 O - Source driver output pins. - G1 to G162 O - Gate driver output pins. - VCI1 I/O - Hi-Z - Connect pin - Power input pin for analog circuits. AVDD I - In normal usage, connect it to AVDDO. AVDDO - AVDD = 5.3V. AVDDO O VCL O VGH I VGHO O - Output of step-up circuit 1 - Connect a capacitor for stabilization. Capacitor - A power supply pin for generating VCOML. - Connect a capacitor for stabilization.
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ST7735 VDDIO O -VDDI voltage output level for monitoring. - DGNDO O -DGND voltage output level for monitoring. - VCC I VCCO O -Power input pin for internal digital reference voltage. -In normal usage, connect it to VCCO. -Monitoring pin of internal digital reference voltage. -Connect a capacitor for stabilization. VCCO Capacitor 6.5 Test pins Name TPI[2] TPI[1] I/O Description Connect pin -These test pins for Driver vender test used. I -Please connect these pins to DGND.
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ST7735 7 Driver electrical characteristics 7.1 Absolute operation range Item Symbol Rating Unit Supply voltage VDD -0.3 ~ +4.6 V Supply voltage (Logic) VDDI -0.3 ~ +4.6 V Supply voltage (Digital) VCC -0.3 ~ +1.95 V Driver supply voltage VGH-VGL -0.3 ~ +30.0 V Logic input voltage range VIN 0.3 ~ VDDI +0.3 V Logic output voltage range VO 0.3 ~ VDDI +0.
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ST7735 Logic-low input IIL VIN = VSS -1 IIL IOH = -1.0mA -0.1 VCOM high voltage VCOMH Ccom=12nF VCOM low voltage VCOML VCOMAC current Input leakage current uA Note 1 +0.1 uA Note 1 2.5 5.0 V Ccom=12nF -2.4 0.0 V |VCOMH-VCOML| 4.0 6.0 V Vsout 0.1 AVDD-0.1 V GVDD 3.0 5.
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ST7735 7.3 Power consumption VDD=2.8V, VDDI=1.8V, Ta=25℃, Frame rate = 60Hz, the registers setting are IC default setting. Current consumption Operation mode Normal mode Partial + Idle mode (40 lines) Sleep-in mode Inversion mode One Line One Line N/A Image Typical Maximum IDDI IDD IDDI IDD (mA) (mA) (mA) (mA) Note 1 0.01 0.5 0.02 0.7 Note 2 0.01 0.5 0.02 0.7 Note 1 0.01 0.3 0.02 0.5 Note 2 0.01 0.3 0.02 0.5 N/A 0.005 0.015 0.01 0.03 Notes: 1. All pixels black. 2.
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ST7735 8 Timing chart 8.1 Parallel interface characteristics: 18, 16, 9 or 8-bit bus (8080 series MCU interface) Fig. 8.1.
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ST7735 D[17:0] TDST Data setup time 10 ns TDHT Data hold time 10 ns TRAT Read access time (ID) 40 ns TRATFM Read access time (FM) 40 ns TODH Output disable time 80 ns For CL=30pF Table 8.1.1 Parallel Interface Characteristics Note: VDDI=1.65 to 3.3V, VDD=2.6 to 3.3V, AGND=DGND=0V, Ta=25 ℃ TR TF TR TF VIH=0.7 x VDDI VOH=0.8 x VDDI VIL=0.3 x VDDI VOL=0.2 x VDDI TR=TF<=15ns TR=TF<=15ns Fig. 8.1.2 Rising and falling timing for input and output signal Fig. 8.1.
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ST7735 8.2 Serial interface characteristics (3-line serial) CSX VIH TCHW VIL TSCYCW/TSCYCR TCSH TCSS TSLW/TSLR SCL TSHW/TSHR TSDS SDA TSCC VIH VIL TSDH VIH VIL TACC TOH VIH VIL VIH SDA (DOUT) VIL Fig. 8.2.
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ST7735 8.3 Serial interface characteristics (4-line serial) Fig. 8.3.
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ST7735 9 Function description 9.1 Interface type selection The selection of given interfaces are done by setting IM2, IM1, and IM0 pins as shown in following table.
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ST7735 9.2 8080-series MCU parallel interface The MCU can use one of following interfaces: 11-lines with 8-data parallel interface, 12-lines with 9-data parallel interface, 19-line with 16-data parallel interface or 21-lines with 18-data parallel interface. The chip-select CSX (active low) enables/disables the parallel interface. RESX (active low) is an external reset signal. WRX is the parallel data write enable, RDX is the parallel data read enable and D[17:0] is parallel data bus.
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ST7735 9.2.1 Write cycle sequence The write cycle means that the host writes information (command or/and data) to the display via the interface. Each write cycle (WRX high-low-high sequence) consists of 3 control signals (D/CX, RDX, WRX) and data signals (D[17:0]). D/CX bit is a control signal, which tells if the data is a command or a data. The data signals are the command if the control signal is low (=’0’) and vice versa it is data (=’1’).
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ST7735 9.2.2 Read cycle sequence The read cycle (RDX high-low-high sequence) means that the host reads information from LCD driver via interface. The driver sends data (D[17:0]) to the host when there is a falling edge of RDX and the host reads data when there is a rising edge of RDX. Fig. 9.2.3 8080-series RDX protocol Note: RDX is an unsynchronized signal (It can be stopped).
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ST7735 9.3 Serial interface The selection of this interface is done by IM2. See the Table 9.3.1. IM2 SPI4W Interface Read back selection 0 0 3-line serial interface Via the read instruction (8-bit, 24-bit and 32-bit read parameter) 0 1 4-line serial interface Via the read instruction (8-bit, 24-bit and 32-bit read parameter) Table 9.3.
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ST7735 Fig. 9.3.2 3-line serial interface write protocol (write to register with control bit in transmission) Fig. 9.3.3 4-line serial interface write protocol (write to register with control bit in transmission) V1.
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ST7735 9.3.2 Read Functions The read mode of the interface means that the micro controller reads register value from the driver. To achieve read function, the micro controller first has to send a command (read ID or register command) and then the following byte is transmitted in the opposite direction. After that CSX is required to go to high before a new command is send (see the below figure).
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ST7735 9.3.4 4-line serial protocol 4-line serial protocol (for RDID1/RDID2/RDID3/0Ah/0Bh/0Ch/0Dh/0Eh/0Fh command: 8-bit read): 4-line serial protocol (for RDDID command: 24-bit read) 4-line Serial Protocol (for RDDST command: 32-bit read) Host Driver Fig. 9.3.5 4-line serial interface read protocol V1.
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ST7735 9.4 Data Transfer Break and Recovery If there is a break in data transmission by RESX pulse, while transferring a command or frame memory data or multiple parameter command data, before Bit D0 of the byte has been completed, then driver will reject the previous bits and have reset the interface such that it will be ready to receive command data again when the chip select line (CSX) is next activated after RESX have been HIGH state. See the following example Host (MCU to driver) Fig. 9.4.
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ST7735 Fig. 9.4.3 Write interrupts recovery (serial interface) If a 2 or more parameter commands are being sent and a break occurs by the other command before the last one is sent, then the parameters that were successfully sent are stored and the other parameter of that command remains previous value. Fig. 9.4.4 Write interrupts recovery (both serial and parallel Interface) V1.
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ST7735 9.5 Data transfer pause It will be possible when transferring a command, frame memory data or multiple parameter data to invoke a pause in the data transmission. If the chip select line is released after a whole byte of a frame memory data or multiple parameter data has been completed, then driver will wait and continue the frame memory data or parameter data transmission from the point where it was paused.
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ST7735 9.6 Data Transfer Modes The module has three kinds color modes for transferring data to the display RAM. These are 12-bit color per pixel, 16-bit color per pixel and 18-bit color per pixel. The data format is described for each interface. Data can be downloaded to the frame memory by 2 methods. 9.6.
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ST7735 9.7 Data Color Coding 9.7.1 8-bit Parallel Interface (IM2, IM1, IM0= “100”) Different display data formats are available for three Colors depth supported by listed below. - 4k colors, RGB 4,4,4-bit input. - 65k colors, RGB 5,6,5-bit input. - 262k colors, RGB 6,6,6-bit input. 9.7.
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ST7735 9.7.
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ST7735 9.7.4 8-bit data bus for 18-bit/pixel (RGB 6-6-6-bit input), 262K-Colors, 3AH= “06h” There is 1 pixel (3 sub-pixels) per 3-bytes.
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ST7735 9.7.5 16-Bit Parallel Interface (IM2,IM1, IM0= “101”) Different display data formats are available for three colors depth supported by listed below. - 4k colors, RGB 4,4,4-bit input - 65k colors, RGB 5,6,5-bit input - 262k colors, RGB 6,6,6-bit input 9.7.
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ST7735 9.7.
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ST7735 9.7.
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ST7735 9.7.9 9-Bit Parallel Interface (IM2, IM1, IM0=“110”) Different display data formats are available for three colors depth supported by listed below. -262k colors, RGB 6,6,6-bit input 9.7.
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ST7735 9.7.11 18-Bit Parallel Interface (IM2, IM1, IM0=“111”) Different display data formats are available for three colors depth supported by listed below. - 4k colors, RGB 4,4,4-bit input - 65k colors, RGB 5,6,5-bit input - 262k colors, RGB 6,6,6-bit input. 9.7.
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ST7735 9.7.
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ST7735 9.7.
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ST7735 9.7.15 3-line serial Interface Different display data formats are available for three colors depth supported by the LCM listed below. 4k colors, RGB 4-4-4-bit input 65k colors, RGB 5-6-5-bit input 262k colors, RGB 6-6-6-bit input 9.7.16 Write data for 12-bit/pixel (RGB 4-4-4-bit input), 4K-Colors, 3AH=“03h” Note 1: Pixel data with the 12-bit color depth information Note 2: The most significant bits are: Rx3, Gx3 and Bx3 Note 3: The least significant bits are: Rx0, Gx0 and Bx0 V1.
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ST7735 9.7.17 Write data for 16-bit/pixel (RGB 5-6-5-bit input), 65K-Colors, 3AH=“05h” Note 1: Pixel data with the 16-bit color depth information Note 2: The most significant bits are: Rx4, Gx5 and Bx4 Note 3: The least significant bits are: Rx0, Gx0 and Bx0 V1.
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ST7735 9.7.18 Write data for 18-bit/pixel (RGB 6-6-6-bit input), 262K-Colors, 3AH=“06h” Note 1: Pixel data with the 18-bit color depth information Note 2: The most significant bits are: Rx5, Gx5 and Bx5 Note 3: The least significant bits are: Rx0, Gx0 and Bx0 V1.
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ST7735 9.7.19 4-line serial Interface Different display data formats are available for three colors depth supported by the LCM listed below. 4k colors, RGB 4-4-4-bit input 65k colors, RGB 5-6-5-bit input 262k colors, RGB 6-6-6-bit input 9.7.20 Write data for 12-bit/pixel (RGB 4-4-4-bit input), 4K-Colors, 3AH=“03h” Note 1: Pixel data with the 12-bit color depth information Note 2: The most significant bits are: Rx3, Gx3 and Bx3 Note 3: The least significant bits are: Rx0, Gx0 and Bx0 V1.
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ST7735 9.7.21 Write data for 16-bit/pixel (RGB 5-6-5-bit input), 65K-Colors, 3AH=“05h” Note 1: Pixel data with the 16-bit color depth information Note 2: The most significant bits are: Rx4, Gx5 and Bx4 Note 3: The least significant bits are: Rx0, Gx0 and Bx0 V1.
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ST7735 9.7.22 Write data for 18-bit/pixel (RGB 6-6-6-bit input), 262K-Colors, 3AH=“06h” Note 1: Pixel data with the 18-bit color depth information Note 2: The most significant bits are: Rx5, Gx5 and Bx5 Note 3: The least significant bits are: Rx0, Gx0 and Bx0 V1.
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ST7735 9.8 Display Data RAM 9.8.1 Configuration (GM[2:0] = “000”) The display module has an integrated 132x162x18-bit graphic type static RAM. This 384,912-bit memory allows storing on-chip a 132xRGBx162 image with an 18-bpp resolution (262K-color). There will be no abnormal visible effect on the display when there is a simultaneous Panel Read and Interface Read or Write to the same location of the Frame Memory. Fig. 9.8.1 Display data RAM organization V1.
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ST7735 9.8.2 Memory to Display Address Mapping 9.8.2.
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ST7735 9.8.2.
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ST7735 9.8.3 Normal Display On or Partial Mode On 9.8.3.1 When using 128RGB x 160 resolution (GM[2:0] = “011”) In this mode, the content of the frame memory within an area where column pointer is 00h to 7Fh and page pointer is 00h to 9Fh is displayed. To display a dot on leftmost top corner, store the dot data at (column pointer, row pointer) = (0, 0). 1).
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ST7735 9.8.3.2 When using 132RGB x 162 resolution (GM[2:0] = “000”) In this mode, contents of the frame memory within an area where column pointer is 00h to 83h and page pointer is 00h to A1h is displayed. To display a dot on leftmost top corner, store the dot data at (column pointer, row pointer) = (0, 0) 1).
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ST7735 9.9 Address Counter The address counter sets the addresses of the display data RAM for writing and reading. Data is written pixel-wise into the RAM matrix of DRIVER. The data for one pixel or two pixels is collected (RGB 6-6-6-bit), according to the data formats. As soon as this pixel-data information is complete the “Write access” is activated on the RAM. The locations of RAM are addressed by the address pointers. The address ranges are X=0 to X=131 (83h) and Y=0 to Y=161 (A1h).
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ST7735 9.10 Memory Data Write/ Read Direction The data is written in the order illustrated above. The Counter which dictates where in the physical memory the data is to be written is controlled by “Memory Data Access Control” Command, bits B5 (MV), B6 (MX), B7 (MY) as described below. Panel Fig. 9.10.1 Data streaming order 9.10.
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ST7735 9.10.3 Frame Data Write Direction According to the MADCTL parameters (MV, MX and MY) Normal MADCTL Parameter MV MX 0 0 MY 0 Y-Mirror 0 0 1 X-Mirror 0 1 0 X-Mirror Y-Mirror 0 1 1 X-Y Exchange 1 0 0 X-Y Exchange Y-Mirror 1 0 1 X-Y Exchange X-Mirror 1 1 0 X-Y Exchange X-Mirror Y-Mirror 1 1 1 Display Data Direction V1.
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ST7735 9.11 Tearing Effect Output Line The Tearing Effect output line supplies to the MPU a Panel synchronization signal. This signal can be enabled or disabled by the Tearing Effect Line Off & On commands. The mode of the Tearing Effect signal is defined by the parameter of the Tearing Effect Line On command. The signal can be used by the MPU to synchronize Frame Memory Writing when displaying video images. 9.11.
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ST7735 9.11.2 Tearing Effect Line Timings The Tearing Effect signal is described below: Table 9.11.1 AC characteristics of Tearing Effect Signal Idle Mode Off (Frame Rate = 60 Hz, Ta=25°C) Symbol Parameter min max unit tvdl Vertical Timing Low Duration 13 - ms tvdh Vertical Timing High Duration 1000 - µs thdl Horizontal Timing Low Duration 33 - µs thdh Horizontal Timing Low Duration 25 500 µs description Note: The timings in Table 9.10.
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ST7735 9.11.3 Example 1: MPU Write is faster than panel read Data write to Frame Memory is now synchronized to the Panel Scan. It should be written during the vertical sync pulse of the Tearing Effect Output Line. This ensures that data is always written ahead of the panel scan and each Panel Frame refresh has a complete new image: V1.
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ST7735 9.11.4 Example 2: MPU write is slower than panel read The MPU to Frame Memory write begins just after Panel Read has commenced i.e. after one horizontal sync pulse of the Tearing Effect Output Line. This allows time for the image to download behind the Panel Read pointer and finishing download during the subsequent Frame before the Read Pointer “catches” the MPU to Frame memory write position. B V1.
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ST7735 9.12 Power ON/OFF Sequence VDD must be powered on before the VDDI. VDDI must be powered off before the VDD. During power off, if LCD is in the Sleep Out mode, VDD and VDDI must be powered down minimum 120msec after RESX has been released. During power off, if LCD is in the Sleep In mode, VDDI or VDD can be powered down minimum 0msec after RESX has been released. CSX can be applied at any timing or can be permanently grounded. RESX has priority over CSX.
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ST7735 9.13 Power Level Definition 9.13.1 Power Level 6 level modes are defined they are in order of Maximum Power consumption to Minimum Power Consumption 1. Normal Mode On (full display), Idle Mode Off, Sleep Out. In this mode, the display is able to show maximum 262,144 colors. 2. Partial Mode On, Idle Mode Off, Sleep Out. In this mode part of the display is used with maximum 262,144 colors. 3. Normal Mode On (full display), Idle Mode On, Sleep Out.
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ST7735 9.13.2 Power Flow Chart Normal display mode on = NOR ON Partial display mode on = PTL ON Idle mode off = IDM OFF Idle mode on = IDM ON Sleep out = SLP OUT Sleep in = SLP IN NOR ON PTL ON Sleep out Normal display mode on Idle mode off IDM ON Power on sequence HW reset SW reset SLP IN SLP OUT Sleep in Normal display mode on Idle mode off Sleep out Normal display mode on Idle mode on Sleep out Partial display mode on Idle mode off PTL ON NOR ON V1.
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ST7735 9.14 Reset Table 9.14.
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ST7735 9.14.
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ST7735 9.15 Module Input/Output Pins 9.15.1 Output or Bi-directional (I/O) Pins Output or Bi-directional pins TE D7 to D0 (Output driver) Input pins RESX CSX D/CX WRX RDX D7 to D0 During Power On Process See 9.
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ST7735 9.16 Reset Timing Table 9.16.1 Reset timing Related Pins RESX Symbol Parameter MIN MAX tRESW Reset pulse duration tREST Reset cancel 10 - 5 120 Unit us ms ms Notes: 1. The reset cancel includes also required time for loading ID bytes, VCOM setting and other settings from EEPROM (or similar device) to registers. This loading is done every time when there is HW reset cancel time (tRT) within 5 ms after a rising edge of RESX. 2.
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ST7735 9.17 Color Depth Conversion Look Up Tables 9.17.
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ST7735 Color BLUE V1.
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ST7735 B175 B174 B173 B172 B171 B170 B185 B184 B183 B182 B181 B180 B195 B194 B193 B192 B191 B190 B205 B204 B203 B202 B201 B200 B215 B214 B213 B212 B211 B210 B225 B224 B223 B222 B221 B220 B235 B234 B233 B232 B231 B230 B245 B244 B243 B242 B241 B240 B255 B254 B253 B252 B251 B250 B265 B264 B263 B262 B261 B260 B275 B274 B273 B272 B271 B270 B285 B284 B283 B282 B281 B280 B295 B294 B293 B292 B291 B290 B305 B304 B303 B302 B301 B300 B315 B314 B313 B312 B311 B310 V1.
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ST7735 9.17.2 4096 Color to 262,144 Color Color RED GREEN BLUE V1.
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ST7735 10 Command 10.1 System function Command List and Description Table 10.1.1 System Function command List (1) Instruction Refer D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 Hex Function 10.1.1 0 ↑ 1 - 0 0 0 0 0 0 0 0 (00h) No Operation SWRESET10.1.2 0 ↑ 1 - 0 0 0 0 0 0 0 1 (01h) Software reset 0 ↑ 1 - 0 0 0 0 0 1 0 0 (04h) Read Display ID NOP RDDID RDDST 1 1 ↑ - - - - - - - - - Dummy read 10.1.
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ST7735 Table 10.1.2 System Function command List (2) WR RDX D17- D7 D6 D5 D4 D3 D2 D1 D0 Hex 10.1.10 0 ↑ 1 - 0 0 0 1 0 0 0 0 (10h) Sleep in & booster off SLPOUT 10.1.11 0 ↑ 1 - 0 0 0 1 0 0 0 1 (11h) Sleep out & booster on PTLON 10.1.12 0 ↑ 1 - 0 0 0 1 0 0 1 0 (12h) Partial mode on NORON 10.1.13 0 ↑ 1 - 0 0 0 1 0 0 1 1 (13h) Partial off (Normal) INVOFF 10.1.14 0 ↑ 1 - 0 0 1 0 0 0 0 0 (20h) Display inversion off INVON 10.1.
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ST7735 Table 10.1.3 System Function command List (3) InstructionRefer D/CX WRXRDX D17-8 D7 PTLAR TEOFF TEON 0 ↑ 1 - 0 D6 D5 D4 D3 D2 D1 D0 Hex Function 0 1 1 0 0 0 0 (30h) Partial start/end address set 1 ↑ 1 - PSL15PSL14 PSL13 PSL12PSL11 PSL10 PSL9 PSL8 10.1.23 1 ↑ 1 - PSL7 PSL6 PSL5 PSL4 PSL3 PSL2 PSL1 PSL0 1 ↑ 1 - PEL15PEL14 PEL13 PEL12PEL11 PEL10 PEL9 PEL8 1 ↑ 1 - PEL7 PEL6 PEL5 PEL4 PEL3 PEL2 PEL1 PEL0 10.1.
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ST7735 10.1.1 NOP (00h) 00H NOP (No Operation) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX NOP 0 ↑ 1 - 0 0 0 0 0 0 0 0 (00h) Parameter No Parameter Description This command is empty command. - “-“ Don’t care V1.
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ST7735 10.1.2 SWRESET (01h): Software Reset 01H SWRESET (Software Reset) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX SWRESET 0 ↑ 1 - 0 0 0 0 0 0 0 1 (01h) Parameter No Parameter - “-“ Don’t care -If Software Reset is applied during Sleep In mode, it will be necessary to wait 120msec before sending next command. Description -The display module loads all default values to the registers during 120msec.
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ST7735 10.1.
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ST7735 10.1.
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ST7735 DISON Display On/Off ‘1’ = On, “0” = Off TEON Tearing effect line on/off ‘1’ = On, “0” = Off GCSEL2 “000” = GC0 GCSEL1 “001” = GC1 Gamma Curve Selection “010” = GC2 “011” = GC3 GCSEL0 ”100” to “111” = Not defined TELOM Tearing effect line mode ‘0’ = mode1, ‘1’ = mode2 ST4 For Future Use ‘0’ ST3 For Future Use ‘0’ ST2 For Future Use ‘0’ ST1 For Future Use ‘0’ ST0 For Future Use ‘0’ “-“ Don’t care Status Default Default Value (ST31 to ST0) ST[31-24] ST[23-16] ST[15-8]
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ST7735 10.1.
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ST7735 10.1.
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ST7735 10.1.
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ST7735 10.1.
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ST7735 10.1.
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ST7735 Serial I/F Mode Parallel I/F Mode Read RDDSM Command Read RDDSM Host Display Send 2nd parameter Legend Parameter Dummy Read Display Flow Chart Send 2nd parameter Action Mode Sequential transter V1.
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ST7735 10.1.10 SLPIN (10h): Sleep In 10H SLPIN (Sleep In) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 SLPIN 0 ↑ 1 - 0 0 0 1 0 0 0 0 Parameter No Parameter HEX (10h) - -This command causes the LCD module to enter the minimum power consumption mode. Description -In this mode the DC/DC converter is stopped, Internal display oscillator is stopped, and panel scanning is stopped. -This command has no effect when module is already in Sleep In mode.
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ST7735 10.1.11 SLPOUT (11h): Sleep Out 11H SLPOUT (Sleep Out) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 SLPOUT 0 ↑ 1 - 0 0 0 1 0 0 0 1 Parameter No Parameter HEX (11h) - -This command turns off sleep mode. Description -In this mode the DC/DC converter is enabled, Internal display oscillator is started, and panel scanning is started. -This command has no effect when module is already in sleep out mode. Sleep Out Mode can only be exit by the Sleep In Command (10h).
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ST7735 10.1.12 PTLON (12h): Partial Display Mode On 12H PTLON (12h): Partial Display Mode On Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 PTLON 0 ↑ 1 - 0 0 0 1 0 0 1 0 Parameter No Parameter HEX (12h) - -This command turns on Partial mode. The partial mode window is described by the Partial Area command (30h) Description -To leave Partial mode, the Normal Display Mode On command (13h) should be written. “-“ Don’t care Default Flow Chart V1.
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ST7735 10.1.13 NORON (13h): Normal Display Mode On 13H NORON (Normal Display Mode On) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 NORON 0 ↑ 1 - 0 0 0 1 0 0 1 1 Parameter No Parameter HEX (13h) - -This command returns the display to normal mode. -Normal display mode on means Partial mode off. Description -Exit from NORON by the Partial mode On command (12h) “-“ Don’t care Default Flow Chart V1.
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ST7735 10.1.14 INVOFF (20h): Display Inversion Off 20H IVNOFF (Normal Display Mode Off) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 INVOFF 0 ↑ 1 - 0 0 1 0 0 0 0 0 Parameter No Parameter HEX (20h) - -This command is used to recover from display inversion mode.
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ST7735 10.1.15 INVON (21h): Display Inversion On 21H IVNOFF (Display Inversion On) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX INVON 0 ↑ 1 - 0 0 1 0 0 0 0 1 (21h) Parameter No Parameter - -This command is used to enter into display inversion mode -To exit from Display Inversion On, the Display Inversion Off command (20h) should be written.
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ST7735 10.1.16 GAMSET (26h): Gamma Set 26H GAMSET (Gamma Set) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX GAMSET 0 ↑ 1 - 0 0 1 0 0 1 1 0 (26h) Parameter 1 ↑ 1 - - - - - GC3 GC2 GC1 GC0 -This command is used to select the desired Gamma curve for the current display. A maximum of 4 curves can be selected. The curve is selected by setting the appropriate bit in the parameter as described in the Table.
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ST7735 10.1.17 DISPOFF (28h): Display Off 28H DISPOFF (Display Off) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 DISPOFF 0 ↑ 1 - 0 0 1 0 1 0 0 0 Parameter No Parameter HEX (28h) - - This command is used to enter into DISPLAY OFF mode. In this mode, the output from Frame Memory is disabled and blank page inserted. - This command makes no change of contents of frame memory. - This command does not change any other status.
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ST7735 10.1.18 DISPON (29h): Display On 29H DISPON (Display On) ↑ DISPON 0 Parameter No Parameter 1 - 0 0 1 0 1 0 0 1 (29h) - - This command is used to recover from DISPLAY OFF mode. Output from the Frame Memory is enabled. - This command makes no change of contents of frame memory. - This command does not change any other status.
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ST7735 10.1.
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ST7735 Flow Chart V1.
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ST7735 10.1.
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ST7735 CASET Legend 1st parameter XS[15:0] 2nd parameter XE[15:0] Command Parameter PASET Flow Chart Display 1st parameter YS[15:0] 2nd parameter YE[15:0] Action Mode RAMWR Sequential transter Image Data D1[7:0],D2[7:0] … … .Dn[7:0] Any Command V1.
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ST7735 10.1.21 RAMWR (2Ch): Memory Write 2CH RAMWR (Memory Write) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX RAMWR 0 ↑ 1 - 0 0 1 0 1 1 0 0 (2Ch) 1st parameter 1 ↑ 1 D17-8 D7 D6 D5 D4 D3 D2 D1 D0 ∣ 1 ↑ 1 ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ Nth parameter 1 ↑ 1 D17-8 D7 D6 D5 D4 D3 D2 D1 D0 In all color modes, there is no restriction on length of parameters. 1.
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ST7735 10.1.22 RAMRD (2Eh): Memory Read 2EH RAMHD (Memory Read) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX RAMHD 0 ↑ 1 - 0 0 1 0 1 1 1 0 (2Eh) 1st parameter 1 1 ↑ - - - - - - - - - 2nd parameter 1 1 ↑ D17-8 D7 D6 D5 D4 D3 D2 D1 D0 ∣ 1 1 ↑ ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ (N+1)th parameter 1 1 ↑ D17-8 D7 D6 D5 D4 D3 D2 D1 D0 -This command is used to transfer data from frame memory to MCU.
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ST7735 10.1.
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ST7735 Flow Chart V1.
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ST7735 10.1.24 TEOFF (34h): Tearing Effect Line OFF 34H TEOFF (Tearing Effect Line OFF) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 TEOFF 0 ↑ 1 - 0 0 1 1 0 1 0 0 Parameter No Parameter Description Default HEX (34h) - -This command is used to turn OFF (Active Low) the Tearing Effect output signal from the TE signal line.
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ST7735 10.1.25 TEON (35h): Tearing Effect Line ON 35H TEON (Tearing Effect Line ON) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX TEON 0 ↑ 1 - 0 0 1 1 0 1 0 1 (35h) Parameter 1 ↑ 1 - 0 0 0 0 0 0 0 TELOM -This command is used to turn ON the Tearing Effect output signal from the TE signal line. -This output is not affected by changing MADCTL bit ML.
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ST7735 10.1.26 MADCTL (36h): Memory Data Access Control 36H MADCTL (Memory Data Access Control) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX MADCTL 0 ↑ 1 - 0 0 1 1 0 1 1 0 (36h) Parameter 1 ↑ 1 - MY MX MV ML RGB MH - - -This command defines read/ write scanning direction of frame memory.
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ST7735 Top-left (0, 0) Top-left (0, 0) Memory Memory ML="0" ML="1" Send first Send 3rd Top-left (0, 0) Display Default Send 2nd Send last Send last Send 3rd Send 2nd Send first Top-left (0, 0) Display Status Default Value Power On Sequence MY=0,MX=0,MV=0,ML=0,RGB=0,MH=0 S/W Reset No Change H/W Reset MY=0,MX=0,MV=0,ML=0,RGB=0,MH=0 Legend Command MADCTL Parameter Display Flow Chart 1st parameter B[7:0] Action Mode Sequential transter V1.
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ST7735 10.1.27 IDMOFF (38h): Idle Mode Off 38H IDMOFF (Idle Mode Off) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 IDMOFF 0 ↑ 1 - 0 0 1 1 1 0 0 0 Parameter No Parameter HEX (38h) - -This command is used to recover from Idle mode on. -In the idle off mode, Description 1. LCD can display 4096, 65k or 262k colors. 2. Normal frame frequency is applied.
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ST7735 10.1.28 IDMON (39h): Idle Mode On 39H IDMON (Idle Mode On) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 IDMOFF 0 ↑ 1 - 0 0 1 1 1 0 0 1 Parameter No Parameter HEX (39h) - -This command is used to enter into Idle mode on. -There will be no abnormal visible effect on the display mode change transition. -In the idle on mode, 1. Color expression is reduced.
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ST7735 Legend Command Idle off mode Parameter IDMON Display Idle on mode Action Flow Chart Mode Sequential transter V1.
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ST7735 10.1.29 COLMOD (3Ah): Interface Pixel Format 3AH COLMOD (3Ah): Interface Pixel Format Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX COLMOD 0 ↑ 1 - 0 0 1 1 1 0 1 0 (3Ah) Parameter 1 ↑ 1 - - - - - - IFPF2 IFPF1 IFPF0 This command is used to define the format of RGB picture data, which is to be transferred via the MCU interface.
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ST7735 10.1.30 RDID1 (DAh): Read ID1 Value DAH RDID1 (Read ID1 Value) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX RDID1 0 ↑ 1 - 1 1 0 1 1 0 1 0 (DAh) 1st parameter 1 1 ↑ - - - - - - - - - - 2nd parameter 1 1 ↑ - ID17 ID16 ID15 ID14 ID13 ID12 ID11 ID10 -This read byte returns 8-bit LCD module’s manufacturer ID -The 1st parameter is dummy data Description -The 2nd parameter (ID17 to ID10): LCD module’s manufacturer ID.
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ST7735 10.1.
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ST7735 10.1.32 RDID3 (DCh): Read ID3 Value DCH RDID3 (Read ID2 Value) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX RDID3 0 ↑ 1 - 1 1 0 1 1 1 0 0 (DCh) - 1st parameter 1 1 ↑ - - - - - - - - - 2nd parameter 1 1 ↑ - ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30 -This read byte returns 8-bit LCD module/driver ID. -The 1st parameter is dummy data Description -The 2nd parameter (ID37 to ID30): LCD module/driver ID.
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ST7735 10.2 Panel Function Command List and Description Table 10.2.1 Panel Function Command List (1) Instruction FRMCTR1 FRMCTR2 FRMCTR3 INVCTR DISSET5 V1.
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ST7735 Table 10.2.2 Panel Function Command List (2) Instruction Refer D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 Hex 0 0 0 0 (C0h) Power control setting 0 ↑ 1 - 1 1 0 0 1 ↑ 1 - 0 0 0 VRH4 VRH3 VRH2 VRH1 VRH0 IB- IB- PWCTR1 10.2.6 1 ↑ 1 - 0 1 Function VRH: Set the GVDD voltage 0 0 0 0 SEL1 SEL0 0 ↑ 1 - 1 1 0 0 0 0 0 1 1 ↑ 1 - 0 0 0 0 0 BT2 BT1 BT0 0 ↑ 1 - 1 1 0 0 0 0 1 0 - 0 0 0 0 0 APA2 APA1 APA0 PWCTR3 10.2.
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ST7735 Table 10.2.3 Panel Function Command List (3) Instruction Refer D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 Hex 1 0 1 0 0 1 0 (D2h) Function Customer Project 0 ↑ 1 - 1 code WRID3 10.2.14 Set the project code 1 ↑ 1 - ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30 at ID3 PWCTR6 10.2.
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ST7735 Table 10.2.
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ST7735 10.2.1 FRMCTR1 (B1h): Frame Rate Control (In normal mode/ Full colors) B1H FRMCTR1 (Frame Rate Control) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX FRMCTR1 0 ↑ 1 - 1 0 1 1 0 0 0 1 (B1h) 1 ↑ 1 - - - - - RTNA3 RTNA2 RTNA1 RTNA0 2 parameter 1 ↑ 1 - - - FPA5 FPA4 FPA3 FPA2 FPA1 FPA0 3rd parameter 1 ↑ 1 - - - BPA5 BPA4 BPA3 BPA2 BPA1 BPA0 st 1 parameter nd -Set the frame frequency of the full colors normal mode.
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ST7735 10.2.2 FRMCTR2 (B2h): Frame Rate Control (In Idle mode/ 8-colors) B2H FRMCTR2 (Frame Rate Control) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX FRMCTR2 0 ↑ 1 - 1 0 1 1 0 0 1 0 (B2h) 1 ↑ 1 - - - - - RTNB3 RTNB2 RTNB1 RTNB0 - FPB5 FPB4 FPB3 FPB2 FPB1 FPB0 - BPB5 BPB4 BPB3 BPB2 BPB1 BPB0 st 1 parameter 2nd parameter rd 3 parameter 1 ↑ 1 - - 1 ↑ 1 - - -Set the frame frequency of the Idle mode.
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ST7735 10.2.
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ST7735 10.2.
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ST7735 10.2.5 DISSET5 (B6h): Display Function set 5 B6H DISSET (Display Function set 5) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX DISSET5 0 ↑ 1 - 1 0 1 1 0 1 1 0 (B6h) 1 ↑ 1 - 0 0 NO1 NO0 SDT1 SDT0 EQ1 EQ0 0 PTG1 PTG0 PT1 PT0 st 1 parameter nd 2 parameter 1 ↑ 1 0 0 0 1st parameter: Set output waveform relation.
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ST7735 Status Default Value B6h Default Power On Sequence 15h/00h S/W Reset 15h/00h H/W Reset 15h/00h Flow Chart V1.
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ST7735 10.2.6 PWCTR1 (C0h): Power Control 1 C0H PWCTR1 (Power Control 1) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX PWCTR1 0 ↑ 1 - 1 1 0 0 0 0 0 0 (C0h) 1st paramete 1 ↑ 1 - 0 0 0 VRH4 VRH3 VRH2 VRH1 VRH0 - 0 1 IB_SEL1IB_SEL0- 0 0 0 nd 2 parameter 1 ↑ 1 -Set the GVDD voltage Note: AVDD=5.3V Description Restriction Register Availability V1.
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ST7735 Status Default Power On Sequence S/W Reset H/W Reset Default Value C0h 02h/70h 02h/70h 02h/70h Flow Chart V1.
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ST7735 10.2.7 PWCTR2 (C1h): Power Control 2 C1H PWCTR2 (Power Control 2) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX PWCTR2 0 ↑ 1 - 1 1 0 0 0 0 0 1 (C1h) 1 parameter 1 ↑ 1 0 0 0 0 0 BT2 BT1 BT0 st -Set the VGH and VGL supply power level Description Restriction Register Availability BT[2:0] VGH 000 4X 9.8 -3X -7.35 001 4X 9.8 -4X -9.8 010 5X 12.25 -3X -7.35 011 5X 12.25 -4X -9.8 100 5X 12.25 -5X -12.25 101 6X 14.
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ST7735 10.2.8 PWCTR3 (C2h): Power Control 3 (in Normal mode/ Full colors) C2H PWCTR3 (Power Control 3) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX PWCTR3 0 ↑ 1 - 1 1 0 0 0 0 1 0 (C2h) 1 parameter 1 ↑ 1 - 0 0 0 0 0 APA2 APA1 APA0 st nd 2 parameter 1 ↑ 1 0 0 0 0 0 DCA2 DCA1 DCA0 -Set the amount of current in Operational amplifier in normal mode/full colors.
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ST7735 Flow Chart V1.
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ST7735 10.2.9 PWCTR4 (C3h): Power Control 4 (in Idle mode/ 8-colors) C3H PWCTR4 (Power Control 4) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX PWCTR4 0 ↑ 1 - 1 1 0 0 0 0 1 1 (C3h) 1 parameter 1 ↑ 1 - 0 0 0 0 0 APB2 APB1 APB0 st nd 2 parameter 1 ↑ 1 0 0 0 0 0 DCB2 DCB1 DCB0 -Set the amount of current in Operational amplifier in Idle mode/8 colors.
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ST7735 Flow Chart V1.
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ST7735 10.2.10 PWCTR5 (C4h): Power Control 5 (in Partial mode/ full-colors) C4H PWCTR5 (Power Control 5) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX PWCTR5 0 ↑ 1 - 1 1 0 0 0 1 0 0 (C4h) 1 parameter 1 ↑ 1 - 0 0 0 0 0 APC2 APC1 APC0 st nd 2 parameter 1 ↑ 1 0 0 0 0 0 DCC2 DCC1 DCC0 -Set the amount of current in Operational amplifier in Partial mode/ full-colors.
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ST7735 Flow Chart V1.
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ST7735 10.2.11 VMCTR1 (C5h): VCOM Control 1 C5H VMCTR1 (VCOM Control 1) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX VMCTR1 0 ↑ 1 - 1 1 0 0 0 1 0 1 (C5h) 1st parameter 1 ↑ 1 - - VMH6 VMH5 VMH 4 VMH 3 VMH 2 VMH 1 VMH 0 2nd parameter 1 ↑ 1 - - VML6 VML5 VML4 VML3 VML2 VML1 VML0 -Set VCOMH Voltage VMH[6:0] Description V1.7 VCOMH VMH[6:0] VCOMH VMH[6:0] VCOMH VMH[6:0] VCOMH 0000000 00h 2.500 0011011 1Bh 3.175 0110110 36h 3.
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ST7735 -Set VCOML Voltage VML[6:0] VCOML 0000000 00h 0000001 01h 0000010 02h 0000011 03h 0000100 04h 0000101 VML[6:0] VCOML VML[6:0] VCOML VML[6:0] VCOML 0011011 1Bh -1.825 0110110 36h -1.150 1010001 51h -0.475 0011100 1Ch -1.800 0110111 37h -1.125 1010010 52h -0.450 0011101 1Dh -1.775 0111000 38h -1.100 1010011 53h -0.425 0011110 1Eh -1.750 0111001 39h -1.075 1010100 54h -0.400 -2.400 0011111 1Fh -1.725 0111010 3Ah -1.050 1010101 55h -0.
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ST7735 Flow Chart V1.
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ST7735 10.2.
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ST7735 10.2.13 WRID2 (D1h): Write ID2 Value D1H WRID2 (Write ID2 Value) Inst / Para D/CX WRX RDX D17 D7 D6 D5 D4 D3 D2 D1 D0 HEX WRID2 0 ↑ 1 - 1 1 0 1 0 0 0 1 (D1h) Parameter 1 ↑ 1 - - ID26 ID25 ID24 ID23 ID22 ID21 ID20 - -Write 7-bit data of LCD module version to save it to EEPROM. Description -The parameter ID2[6:0] is LCD Module version ID. Flow Chart V1.
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ST7735 10.2.14 WRID3 (D2h): Write ID3 Value D2H WRID3 (Write ID3 Value) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX WRID3 0 ↑ 1 - 1 1 0 1 0 0 1 0 (D2h) Parameter 1 ↑ 1 - ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30 - Description -Write 8-bit data of project code module to save it to EEPROM. -The parameter ID3[7:0] is product project ID. Flow Chart V1.
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ST7735 10.2.15 PWCTR6 (FCh): Power Control 5 (in Partial mode + Idle mode) FCH PWCTR6 (Gamma control adjust) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX PWCTR6 0 ↑ 1 - 1 1 1 1 1 1 0 0 (FCh) 1 parameter 1 ↑ 1 - - Sapa2 Sapa1 Sapa0 - Sapb2 Sapb1 Sapb0 2nd parameter 1 ↑ 1 - - Sapc2 Sapc1 Sapc0 - DCD2 DCD1 DCD0 Description -Set the amount of current in Operational amplifier in Partial mode + Idle mode.
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ST7735 10.2.
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ST7735 10.2.17 NVFCTR2 (DEh): EEPROM Read Command DEH NVFCTR1 (NV Memory Function Controller 2) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX NVFCTR2 0 ↑ 1 - 1 1 0 1 1 1 1 0 (DEh) parameter 1 ↑ 1 1 0 1 0 0 1 0 1 A5 EEPROM Read Command Description NOTE: “-“ Don’t care Flow Chart V1.
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ST7735 10.2.18 NVFCTR3 (DFh): EEPROM Write Command DFH NVFCTR1 (NV Memory Function Controller 3 Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX NVFCTR1 0 ↑ 1 - 1 1 0 1 1 1 1 1 (DFh) st 1 parameter 1 ↑ 1 EE_IB7 EE_IB6 EE_IB5 EE_IB4 EE_IB3 EE_IB2 EE_IB1 EE_IB0 nd 2 parameter 1 ↑ 1 EE_CMD7 EE_CMD6 EE_CMD5 EE_CMD4 EE_CMD3 EE_CMD2 EE_CMD1 EE_CMD0 3rd parameter 1 ↑ 1 1 0 1 0 0 1 0 1 A5 -EEPROM Write Command -EE_IB[7:0] : Select Command.
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ST7735 10.2.
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ST7735 Flow Chart V1.
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ST7735 10.2.
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ST7735 Flow Chart V1.
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ST7735 10.2.21 EXTCTRL (F0h): Extension Command Control F0H EXTCTRL (Extension command control) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX EXTCTRL 0 ↑ 1 - 1 1 1 1 0 0 0 0 (F0h) parameter 1 ↑ 1 0 0 0 0 0 0 0 1 (01h) When EXTC PIN =”L”, this command will enable extension command. Description NOTE: “-“ Don’t care Flow Chart V1.
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ST7735 10.2.
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ST7735 Flow Chart V1.
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ST7735 11 Power structure 11.1 Driver IC Operating Voltage Specification Fig 11.1.1 Power Booster Level V1.
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ST7735 11.
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ST7735 11.2.1 EXTERNAL COMPONENTS CONNECTION Pad Name Rated (Min) Typical Voltage capacitance value Connection VDDI VDDI (Logic Power) 6.3V 1.0 uF VDD VDD (Analog Power) 6.3V 1.0 uF VCC Connect to Capacitor: VCC -------||-------- GND 6.3V 1.0 uF C41P, C41N Connect to Capacitor: C41P -------||--- -----C41N 6.3V 1.0 uF C22P, C22N Connect to Capacitor: C22P -------||--------C22N 25.0V; 16.0V* 0.1 uF C23P, C23N Connect to Capacitor: C23P -------||--- -----C23N 25.0V; 16.0V* 0.
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ST7735 12 Gamma structure 12.1 TRUCTURE OF GRAYSCALE AMPLIFIER The structure of grayscale amplifier is shown as below. 16 voltage levels (VIN0-VIN15) between GVDD and VGS are determined by the high/ mid/ low level adjustment registers. Each mid-adjustment level is split into 64 levels again by the internal ladder resistor network. As a result, grayscale amplifier generates 64 voltage levels ranging from V0 to V63 and outputs one of 64 levels. V1.
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ST7735 12.
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ST7735 40 V36-(V36-V44)*(16/32) V36-(V36-V44)*(16/32) 41 V36-(V36-V44)*(20/32) V36-(V36-V44)*(20/32) 42 V36-(V36-V44)*(24/32) V36-(V36-V44)*(24/32) 43 V36-(V36-V44)*(28/32) V36-(V36-V44)*(28/32) 44 VINP9 VINN9 45 V44-(V44-V52)*(4/32) V44-(V44-V52)*(4/32) 46 V44-(V44-V52)*(8/32) V44-(V44-V52)*(8/32) 47 V44-(V44-V52)*(12/32) V44-(V44-V52)*(12/32) 48 V44-(V44-V52)*(16/32) V44-(V44-V52)*(16/32) 49 V44-(V44-V52)*(20/32) V44-(V44-V52)*(20/32) 50 V44-(V44-V52)*(24/32) V44-(V44-V52)*
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ST7735 13 Example Connection with Panel direction and Different Resolution 13.1 Application of connection with panel direction Case 1: (This is default case) st - 1 Pixel is at Left Top of the panel - RGB filter order = RGB 1st pixel IC (Bump down) LCD Front side CF Glass TFT Glass Case 2: st - 1 Pixel is at Left Top of the panel - RGB filter order = BGR 1st pixel IC (Bump down) LCD Front side CF Glass TFT Glass V1.
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ST7735 Case 3: st - 1 Pixel is at Righ Bottom of the panel - RGB filter order = RGB IC (Bump down) LCD Front side CF Glass 1st pixel TFT Glass Case 4: st - 1 Pixel is at Righ Bottom of the panel - RGB filter order = BGR IC (Bump down) LCD Front side CF Glass 1st pixel TFT Glass V1.
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ST7735 13.2 Application of connection with Different resolution Case1 of Resolution (128RGB x 160) (GM[2:0] = “011”) RAM size=128 x 160 x 18-bit (Used) Display size = 128RGB x 160 1). Example for SMX=SMY=’0’ 2). Example for SMX=SMY=’1’ V1.
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ST7735 Case2 of Resolution (132RGB x 162) (GM[2:0] = “000”) RAM size=132 x 162 x 18-bit (Used) Display size = 132RGB x 162 1).
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ST7735 13.3 MicroProcessor Interface applications 8080-Seriers MCU + SPI Interface ( IM2=’1’) 13.3.1 8080-Series MCU Interface for 8-bit data bus (IM1, IM0=”00”) Driver IC Host Note: IM2=’0’, SPI I/F IM2=’1’, MCU I/F RESX TE RESX TE SCL SDA D/CX (SCL) WRX RDX D7 to D1 D0 “0” “0” D/CX WRX RDX D7 to D1 D0 D15 to D8 D17 to D16 ”00” IM2 IM1,IM0 IM2 Fig. 13.3.1 8080 Series MCU Interface for 8-bit data bus 13.3.
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ST7735 13.3.3 8080-Series MCU Interface for 9-bit data bus (IM1, IM0=”10”) Driver IC Host Note: IM2=’0’, SPI I/F IM2=’1’, MCU I/F RESX TE RESX TE SCL SDA D/CX (SCL) WRX RDX D8 to D1 D0 “0” “0” D/CX WRX RDX D8 to D1 D0 D15 to D9 D17 to D16 ”10” IM2 IM1,IM0 IM2 Fig. 13.3.3 8080 Series MCU Interface for 9-bit data bus 13.3.
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ST7735 14 Revision History ST7735 Specification Revision History Version Date Description 1.0 2008/11/27 First issue. 1.1 2009/01/05 Modify address counter description (P58) Modify DISPOFF(28h) and DISPON(29h) command description (P97~98) Modify frame rate control command (B1~B3h) description (P122~124) Modify ROM code default value (P122~140) Modify external components table, AVDD capacitance value change and schottky diode remove.