Data Sheet

NUC123
May 3, 2017 Page 9 of 99 Rev.2.04
NUC123 SERIES DATASHEET
2 FEATURES
NuMicro
®
NUC123 Series Features 2.1
Core
ARM
®
Cortex
®
-M0 core runs up to 72 MHz
One 24-bit system timer
Supports low power sleep mode
Single-cycle 32-bit hardware multiplier
NVIC for the 32 interrupt inputs, each with 4-levels of priority
Supports Serial Wire Debug with 2 watchpoints/4 breakpoints
Built-in LDO for wide operating voltage ranges from 2.5 V to 5.5 V
Flash Memory
36/68 KB Flash for program code
4 KB flash for ISP loader
Supports In-System Program (ISP) application code update
512 byte page erase for flash
Configurable Data Flash address and size for both 36KB and 68KB system
Supports 2-wire ICP update through SWD/ICE interface
Supports fast parallel programming mode by external programmer
SRAM Memory
12/20 KB embedded SRAM
Supports PDMA mode
PDMA (Peripheral DMA)
Supports 6 channels PDMA for automatic data transfer between SRAM and
peripherals such as SPI, UART, I
2
S, USB 2.0 FS device, PWM and ADC
Supports CRC calculation with four common polynomials, CRC-CCITT, CRC-8, CRC-
16 and CRC-32
Clock Control
Flexible selection for different applications
Built-in 22.1184 MHz high speed oscillator (Trimmed to 1%) for system operation, and
low power 10 kHz low speed oscillator for watchdog and wake-up operation
Supports one PLL, up to 144 MHz, for high performance system operation
External 4~24 MHz high speed crystal input for precise timing operation
GPIO
Four I/O modes:
Quasi bi-direction
Push-Pull output
Open-Drain output
Input only with high impendence
TTL/Schmitt trigger input selectable
I/O pin configured as interrupt source with edge/level setting
Supports High Driver and High Sink I/O mode
Timer
Supports 4 sets of 32-bit timers with 24-bit up-timer and one 8-bit pre-scale counter
Independent clock source for each timer
Provides one-shot, periodic, toggle and continuous counting operation modes
Supports event counting function
Watchdog/Windowed-Watchdog Timer
Multiple clock sources