Data Sheet

NUC123
May 3, 2017 Page 49 of 99 Rev.2.04
NUC123 SERIES DATASHEET
HIRC
(22.1184 MHz)
HXT
(4~12 MHz)
LIRC
(10 kHz)
111
011
010
PLLFOUT
HXT
LIRC
HIRC
000
CLKSEL0[2:0]
1/(HCLK_N+1)
PCLK1/(APBDIV+1)
CLKSEL1[22:20]
CLKSEL1[18:16]
CLKSEL1[14:12]
CLKSEL1[10: 8]
1
0
PLL
HIRC
HXT
PLLCON[19]
111
011
010
000
1/2
1/2
1/2
HCLK
HIRC
HXT
CLKSEL0[5:3]
0011/2
CPUCLK
HCLK
PLLFOUT
010
111
011
LIRC
HIRC
{CLKSEL2[8], CLKSEL1[29:28]}
000
HCLK
HXT
{CLKSEL2[9], CLKSEL1[31:30]}
10
11
HIRC
00
HCLK
HXT
CLKSEL2[3:2] 10
11
PLLFOUT
HIRC
01
00
HCLK
HXT
CLKSEL2[1:0]
HIRC
000
111
100
TMx, x = 0, 1, 2
HIRC
LIRC
HXT
HCLK
010
011
10
11
LIRC
HCLK
CLKSEL2[17:16]
1/2048
LIRC
10
11
LIRC
HCLK
CLKSEL1[1:0]
1/2048
CLKSEL1[3:2]
1/(ADC_N+1)
1/(USB_N+1)
PLLFOUT
11
PLLFOUT
HIRC
01
00
HXT
CLKSEL1[25:24]
1/(UART_N+1)
1
0
HCLK
PLLFOUT
CLKSEL1[4]
CLKSEL1[5]
CLKSEL1[6]
CPU
AHB
PDMA
APB
I2C 0-1
TMR 0
TMR 1
TMR 2
TMR 3
BOD
SysTick
PWM 2-3
PWM 0-1
PS2
FMC
FDIV
I2S
ADC
USB
WDT
WWDT
UART0/1
SPI0
SPI1
SPI2
Note: Before clock switching, both the pre-selected and newly selected clock sources must be turned on and
stable.
Figure 6-10 Clock Generator Global View Diagram