Data Sheet

NUC123
May 3, 2017 Page 30 of 99 Rev.2.04
NUC123 SERIES DATASHEET
System Manager 6.2
6.2.1 Overview
The system manager provides the functions of system control, power modes, wake-up sources,
reset sources, system memory map, product ID and multi-function pin control. The following
sections describe the functions for
 System Reset
 System Power Architecture
 System Memory Map
 System management registers for Part Number ID, chip reset and on-chip controllers
reset, and multi-functional pin control
 System Timer (SysTick)
 Nested Vectored Interrupt Controller (NVIC)
 System Control registers
6.2.2 System Reset
The system reset can be issued by one of the events listed below. These reset event flags can be
read from RSTSRC register to determine the reset source. Hardware reset can reset chip through
peripheral reset signals. Software reset can trigger reset through control registers.
 Hardware Reset Sources
– Power-on Reset (POR)
– Low level on the nRESET pin
– Watchdog Time-out Reset and Window Watchdog Reset (WDT/WWDT Reset)
– Low Voltage Reset (LVR)
– Brown-out Detector Reset (BOD Reset)
 Software Reset Sources
– CHIP Reset will reset whole chip by writing 1 to CHIPRST (IPRSTC1[0])
– MCU Reset to reboot but keeping the booting setting from APROM or LDROM
by writing 1 to SYSRESETREQ (AIRCR[2])
– CPU Reset for Cortex
®
-M0 core Only by writing 1 to CPURST (IPRSTC1[1])
Power-on Reset or CHIP_RST (IPRST1[0]) resets the whole chip including all peripherals,
external crystal circuit and BS (ISPCON[1]) bit.
SYSRESETREQ (AIRCR[2]) resets the whole chip including all peripherals, but does not reset
external crystal circuit and BS (ISPCON[1]) bit.