Data Sheet
Table Of Contents
- 1.0 Device Overview
- 2.0 Can Message Frames
- 3.0 Message Transmission
- 4.0 Message Reception
- 5.0 Bit Timing
- 6.0 Error Detection
- 7.0 Interrupts
- 8.0 Oscillator
- 9.0 RESET
- 10.0 Modes of Operation
- 11.0 Register Map
- 12.0 SPI™ Interface
- 12.1 Overview
- 12.2 Reset Instruction
- 12.3 Read Instruction
- 12.4 Read RX Buffer Instruction
- 12.5 Write Instruction
- 12.6 Load TX Buffer Instruction
- 12.7 Request-To-Send (RTS) Instruction
- 12.8 Read Status Instruction
- 12.9 RX Status Instruction
- 12.10 Bit Modify Instruction
- Figure 12-1: Bit Modify
- Table 12-1: SPI™ Instruction Set
- Figure 12-2: Read instruction
- Figure 12-3: Read RX Buffer Instruction
- Figure 12-4: Byte Write instruction
- Figure 12-5: Load TX Buffer
- Figure 12-6: Request-to-send (RTS) instruction
- Figure 12-7: BIT Modify instruction
- Figure 12-8: Read Status instruction
- Figure 12-9: RX StatUs Instruction
- Figure 12-10: SPI™ Input Timing
- Figure 12-11: SPI™ Output TIming
- 13.0 Electrical Characteristics
- 14.0 PackAging Information
© 2005 Microchip Technology Inc. Preliminary DS21801D-page 5
MCP2515
1.4 Transmit/Receive
Buffers/Masks/Filters
The MCP2515 has three transmit and two receive
buffers, two acceptance masks (one for each receive
buffer) and a total of six acceptance filters. Figure 1-3
shows a block diagram of these buffers and their
connection to the protocol engine.
FIGURE 1-3: CAN BUFFERS AND PROTOCOL ENGINE BLOCK DIAGRAM
Acceptance Filter
RXF2
R
X
B
1
Identifier
Data Field Data Field
Identifier
Acceptance Mask
RXM1
Acceptance Filter
RXF3
Acceptance Filter
RXF4
Acceptance Filter
RXF5
M
A
B
Acceptance Filter
RXF0
Acceptance Filter
RXF1
R
X
B
0
TXREQ
TXB2
ABTF
MLOA
TXERR
MESSAGE
Message
Queue
Control
Transmit Byte Sequencer
TXREQ
TXB0
ABTF
MLOA
TXERR
MESSAGE
CRC<14:0>
Comparator
Receive<7:0>Transmit<7:0>
Receive
Error
Transmit
Error
Protocol
REC
TEC
ErrPas
BusOff
Finite
State
Machine
Counter
Counter
Shift<14:0>
{Transmit<5:0>, Receive<8:0>}
Transmit
Logic
Bit
Timing
Logic
TX RX
Configuration
Registers
Clock
Generator
PROTOCOL
ENGINE
BUFFERS
TXREQ
TXB1
ABTF
MLOA
TXERR
MESSAGE
Acceptance Mask
RXM0
A
c
c
e
p
t
A
c
c
e
p
t
SOF