User`s manual

59
3
BIOS Setup
3.1.3.9 System BIOS Cacheable
When this field is enabled, accesses to the system BIOS ROM
addressed at F0000H-FFFFFH are cached, provided that the cache
controller is enabled. The larger the range of the Cache RAM, the
higher the efficiency of the system.
3.1.3.10 Video BIOS Cacheable
As with caching the system BIOS, enabling the Video BIOS cache
will allow access to video BIOS addresssed at C0000H to
C7FFFH to be cached, if the cache controller is also enabled. The
larger the range of the Cache RAM, the faster the video perform-
ance.
3.1.3.11 Delayed Transaction
When enabled, this function frees up the PCI bus for other PCI
masters during the PCI-to-ISA transactions. This allows PCI and
ISA buses to be used more efficiently and prevents degradation
of performance on the PCI bus when ISA accesses are made.
3.1.3.12 AGP Aperture Size (MB)
This field is relevant to the memory-mapped graphics data of the
AGP card installed in your system. Leave this in its default setting.
3.1.3.13 AGP 4X Mode
Leave this field in its default setting. Do not alter this setting un-
less advised by an engineer or technician.