User`s manual

G586VPA
Pin Name No. LBC
1
LBC
2
LBM
3
LBT
ADR<31..2> 30 O I O I
ADS# 1 O I O I
BE<3..0> 4 O I O I
BLAST# 1 O I O I
BRDY# 1 I O I O
D/C# 1 O I O I
DAT<31..0> 32 I/O I/O I/O I/O
ID<4..0> 5 O O I I
IRQ9 1 I I O O
LBS16# 1 I O I O
LCLK 1 O O I I
LDEV<x>#
4
1 I N/A N/A O
LEADS# 1 O I O I
LGNT<x>#
4
1 O O I N/A
LKEN# 1 O O I I
LRDY# 1 I I N/A O
LREQ<x>#
4
1 I I O O
M/IO# 1 O I O I
RDYRTN# 1 O O I I
RESET# 1 O O I I
W/R# 1 O I O I
WBACK# 1 O O I N/A
(power) 8
(ground) 14
(reserved) 1
Total per slot 112
1
Direction of signals for the LBC if the host CPU or a system I/O bus
master is active.
2
Direction of signals for the LBC if an LBM is active.
3
Direction of signals for any LBM while it owns the VL-Bus.
4
One unique signal per slot or device.
Note:
LBC = VL Local Bus Controller
LBM = VL Local Bus Master
LBT = VL Local Bus Target
Appendix E u E-2