User`s manual

www.dfi .comChapter 3 Hardware Installation
25
Chapter 3
Signal Pin# Pin Type Pwr Rail /Tolerance PU/PD Description
SPI
_
CS# B97 O CMOS 3.3V Sus
p
end
/
3.3
V
Chi
p
select for Carrier Board SPI - ma
y
be sourced from chi
p
set SPI0 or SPI1
SPI_MISO A92 I CMOS 3.3V Suspend/3.3V Data in to Module from Carrier SPI
SPI_MOSI A95 O CMOS 3.3V Suspend/3.3V Data out from Module to Carrier SPI
SPI_CLK A94 O CMOS 3.3V Suspend/3.3V Clock from Module to Carrier SPI
SPI_POWER A91 O 3.3V Suspend/3.3V
Power supply for Carrier Board SPI – sourced from Module – nominally
3.3V. The Module shall provide a minimum of 100mA on SPI_POWER.
Carriers shall use less than 100mA of SPI_POWER. SPI_POWER
shall only be used to power SPI devices on the Carrier
BIOS
_
DIS0#
A
34
BIOS_DIS1# B88
Signal Pin# Pin Type Pwr Rail /Tolerance PU/PD Description
VGA_RED B89 O Analog Analog PD 150R Red for monitor. Analog output
VGA_GRN B91 O Analog Analog PD 150R Green for monitor. Analog output
VGA_BLU B92 O Analog Analog PD 150R Blue for monitor. Analog output
VGA_HSYNC B93 O CMOS 3.3V / 3.3V Horizontal sync output to VGA monitor
VGA_VSYNC B94 O CMOS 3.3V / 3.3V Vertical sync output to VGA monitor
VGA_I2C_CK B95 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V DDC clock line (I2C port dedicated to identify VGA monitor capabilities)
VGA_I2C_DAT B96 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V DDC data line.
Signal Pin# Pin Type Pwr Rail /Tolerance PU/PD Description
SER0_TX A98 O CMOS 3.3V/5V General purpose serial port 0 transmitter
SER0_RX A99 I CMOS 3.3V/5V General purpose serial port 0 receiver
SER1_TX A101 O CMOS 3.3V/5V General purpose serial port 1 transmitter
SER1_RX A102 I CMOS 3.3V/5V General purpose serial port 1 receiver
Signal Pin# Pin Type Pwr Rail /Tolerance PU/PD Description
I2C_CK B33 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB General purpose I2C port clock output
I2C_DAT B34 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB General purpose I2C port data I/O line
SPKR B32 O CMOS 3.3V / 3.3V
Output for audio enunciator - the "speaker" in PC-AT systems.
This port provides the PC beep signal and is mostly intended for
debugging purposes.
WDT B27 O CMOS 3.3V
/
3.3V Out
p
ut indicatin
g
that a watchdo
g
time-out event has occurred
.
FAN_PWNOUT B101 O OD CMOS 3.3V / 12V Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM.
FAN_TACHIN B102 I OD CMOS 3.3V / 12V PU 10K to 3.3V Fan tachometer input for a fan with a two pulse output.
TPM_PP A96 I CMOS 3.3V / 3.3V
Trusted Platform Module (TPM) Physical Presence pin. Active high.
TPM chip has an internal pull down. This signal is used to indicate
Physical Presence to the TPM.
V
GA Si
g
nals Descri
p
tions
Serial Interface Si
g
nals Descri
p
tions
Miscellaneous Si
g
nal Descri
p
tions
SPI Si
g
nals Descri
p
tions
I CMOS NA
Selection straps to determine the BIOS boot device.
The Carrier should only float these or pull them low, please refer to
COM Express Module Base Specification Revision 2.1 for strapping options of BIOS disable signals.