Parallax P2 Edge Module - Datasheet

Interrupt Instructions
Instruction
Description
Clocks
Cog, LUT & Hub
ALLOWI
Allow interrupts (default).
2
BRK {#}D
If in debug ISR, set next break condition to D. Else, set BRK code to D[7:0] and unconditionally trigger BRK
interrupt, if enabled.
2
COGBRK {#}D
If in debug ISR, trigger asynchronous breakpoint in cog D[3:0]. Cog D[3:0] must have asynchronous breakpoint
enabled.
2
GETBRK D WC/WZ/WCZ
Get breakpoint/cog status into D according to WC/WZ/WCZ. See documentation for details.
2
NIXINT1
Cancel INT1.
2
NIXINT2
Cancel INT2.
2
NIXINT3
Cancel INT3.
2
SETINT1 {#}D
Set INT1 source to D[3:0].
2
SETINT2 {#}D
Set INT2 source to D[3:0].
2
SETINT3 {#}D
Set INT3 source to D[3:0].
2
STALLI
Stall Interrupts.
2
TRGINT1
Trigger INT1, regardless of STALLI mode.
2
TRGINT2
Trigger INT2, regardless of STALLI mode.
2
TRGINT3
Trigger INT3, regardless of STALLI mode.
2
Register Indirection Instructions
Instruction
Description
Clocks
Cog & LUT / Hub
ALTB D,{#}S
Alter D field of next instruction to D[13:5].
2
ALTB D,{#}S
Alter D field of next instruction to (D[13:5] + S) & $1FF. D += sign-extended S[17:9].
2
ALTD D
Alter D field of next instruction to D[8:0].
2
ALTD D,{#}S
Alter D field of next instruction to (D + S) & $1FF. D += sign-extended S[17:9].
2
ALTGB D
Alter subsequent GETBYTE/ROLBYTE instruction. Next S field = D[10:2], N field = D[1:0].
2
ALTGB D,{#}S
Alter subsequent GETBYTE/ROLBYTE instruction. Next S field = (D[10:2] + S) & $1FF, N field = D[1:0]. D +=
sign-extended S[17:9].
2
ALTGN D
Alter subsequent GETNIB/ROLNIB instruction. Next S field = D[11:3], N field = D[2:0].
2
ALTGN D,{#}S
Alter subsequent GETNIB/ROLNIB instruction. Next S field = (D[11:3] + S) & $1FF, N field = D[2:0]. D +=
sign-extended S[17:9].
2
ALTGW D
Alter subsequent GETWORD/ROLWORD instruction. Next S field = D[9:1], N field = D[0].
2
ALTGW D,{#}S
Alter subsequent GETWORD/ROLWORD instruction. Next S field = ((D[9:1] + S) & $1FF), N field = D[0]. D +=
sign-extended S[17:9].
2
ALTI D
Execute D in place of next instruction. D stays same.
2
ALTI D,{#}S
Substitute next instruction's I/R/D/S fields with fields from D, per S. Modify D per S.
2
ALTR D
Alter result register address (normally D field) of next instruction to D[8:0].
2
ALTR D,{#}S
Alter result register address (normally D field) of next instruction to (D + S) & $1FF. D += sign-extended S[17:9].
2
ALTS D
Alter S field of next instruction to D[8:0].
2
ALTS D,{#}S
Alter S field of next instruction to (D + S) & $1FF. D += sign-extended S[17:9].
2
ALTSB D
Alter subsequent SETBYTE instruction. Next D field = D[10:2], N field = D[1:0].
2
ALTSB D,{#}S
Alter subsequent SETBYTE instruction. Next D field = (D[10:2] + S) & $1FF, N field = D[1:0]. D += sign-extended
S[17:9].
2
ALTSN D
Alter subsequent SETNIB instruction. Next D field = D[11:3], N field = D[2:0].
2
ALTSN D,{#}S
Alter subsequent SETNIB instruction. Next D field = (D[11:3] + S) & $1FF, N field = D[2:0]. D += sign-extended
S[17:9].
2
ALTSW D
Alter subsequent SETWORD instruction. Next D field = D[9:1], N field = D[0].
2
ALTSW D,{#}S
Alter subsequent SETWORD instruction. Next D field = (D[9:1] + S) & $1FF, N field = D[0]. D += sign-extended
S[17:9].
2
Copyright © Parallax Inc. 2021/05/27 ▪ Parallax Propeller 2 (P2X8C4M64P) Datasheet ▪ Page 41