System information

Book Title
Memory Maps
B-510
Table B-8 Cisco 4000 Memory Map of Onboard Resources
03000000–031FFFFF 2 MB —
03000000–033FFFFF 4 MB —
03000000–037FFFFF 8 MB
2
—
05000000 System DRAM Upper 16 MB of 32-MB configuration
06000000–06FFFFFF 32 Shared (I/O) memory 8-, 16-, 32-bit unaligned access
supported; 1–16 MB
06000000–060FFFFF 1 MB —
06000000–063FFFFF 4 MB —
06000000–067FFFFF 8 MB —
04000000–05FFFFFF Undefined —
07000000–07FFFFFF Undefined —
08000000–08FFFFFF 32 I/O expansion NIM slots
08000000–080FFFFF 16 NIM at I/O expansion
slot 1
16-bit aligned access only
08100000–081FFFFF 16 NIM at I/O expansion
slot 2
16-bit aligned access only
08200000–082FFFFF 16 NIM at I/O expansion
slot 3
16-bit aligned access only
1 Only the Cisco 4000-M supports 32-MB DRAM. The 32-MB configuration is split into two discontiguous pieces, with the upper
16 MB mapped to begin at location 05000000.
2 Only the Cisco 4000-M supports 8-MB Flash memory.
Address Bit Width Description Comments
02000000–0201FFFF 8 NVRAM battery
backed up CMOS SRAM
128 KB, fixed; also
accommodates 32 KBx8 and
8 KBx8
02110000 32 System status and
control registers
—
02110002 Hardware revision —
02110040–0211005F 8 System ID PROM cookie 24 bytes
02110100 32 Shared memory control register —
02120000 8 Counter timer —
02120040 8 Counter interrupt control register —
02120100–0212013F 8 Control serial I/O —
Address Bit Width Description Comments