User Guide

34
S-101
QT240 (IC306: 1U-3681)
SN74LV244APW (IC708, 719: 1U-3694) BU2090F (IC303: 1U-3681)
SN74HCT244APW (IC205: 1U-3694) (IC304, 504: 1U-3695)
NJM2595 (IC507, 508: 1U-3695)
SN74LV157APW (IC704: 1U-3694) SN74LVC139APWR (IC902: 1U-3694)
SNS1
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
SNS1K
OUT1
OUT2
VSS
OUT3
SS/SYNC
n.c.
OSC
OUT4
/RES
VDD
SNS4
SNS4K
SNS3K
SNS3SNS2K
QT240
20-SSOP
SNS2
10
19
20
n.c. n.c.
Sense pin (to Cs3, electrode); OPT1SNS3K20
Sense pin (to Rs3 + Cs3)SNS319
Sense pin (to Cs4, electrode); OPT2SNS4K18
Sense pin (to Rs4 + Cs4)SNS417
Ground or no connectVSS16
Oscillator bias inOSC15
Power: +4.0 to +5V locally regulatedVDD14
Reset pin, active low. Can usually tie to Vdd./RES13
Output, key 4OUT412
Unbonded internallyn.c.11
Unbonded internallyn.c.10
Sync in and/or spread spectrum driveSYNC/SS9
GroundVSS8
Output, key 3OUT37
Output, key 2OUT26
Output, key 1OUT15
Sense pin (to Cs1, electrode); speed optionSNS1K4
Sense pin (to Rs1 + Cs1)SNS13
Sense pin (to Cs2, electrode)SNS2K2
Sense pin (to Rs2 + Cs2)SNS21
DescriptionNamePin
T ABLE 1-1 P IN L ISTING - QT240-ISS
1
2
3
4
5
6
7
8
20
19
18
16
15
14
13
I3
VCC
OE2
O2
I5
O0
I4
O1
I6
OE
I0
O4
I1
O5
I2
O6
912
O7 O3
10 11
GND
I7
17
1
2
3
4
5
6
7
8
18
17
16
15
14
13
12
11Q3
VDD
OE
Q7
Q8
Q11
Q10
Q9
Q6
VSS
DATA
CLOCK
LCK
Q0
Q1
Q2
9
10
Q4
Q5
CONTROL CIRCUIT
12-bit SHIFT RE GISTER
12-bi t STRAGE REGISTER
OUTPUT BUFFER ( OPEN DRAI N)
1
8
9
16
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Vcc
ST
4A
4B
4Y
3A
3B
3Y
SE
LECT
5
SEL
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND
V
CC
2G
2A
2B
2Y0
2Y1
2Y2
2Y3
FUNCTION TABLE
(each decoder/demultiplexer)
INP U TS
OUTP UTS
G
SELECT
OUTP UTS
G
B A Y3 Y2 Y1 Y0
L L L H H H L
L L HHHLH
L H LHLHH
L H HLHHH
H X X H H H H