User Guide

59
Q307 : SN74LV04APW
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
V
CC
6A
6Y
5A
5Y
4A
4Y
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H L
L H
LOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC)
YA
Q308, Q501 : SN74LV125APW
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
OE
A
OUTPUT
Y
L H H
L LL
H X Z
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OE
1A
1Y
2OE
2A
2Y
GND
V
CC
4OE
4A
4Y
3OE
3A
3Y
LOGIC DIAGRAM (POSITIVE LOGIC)
2A 2Y
2OE
1A 1Y
1OE
1
2
4
5
3
6
4A 4Y
4OE
3A 3Y
3OE
10
9
13
12
8
11
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.