User Guide

55
Q103 : ES29LV160EB-70TGI-M
ESI
ESI
Command
Register
Analog Bias
Generator
Address Latch
BYTE#
CE#
OE#
A<0:19>
RESET#
Vcc
Vss
Chip Enable
Output Enable
Logic
Vcc Detector
Timer/
Counter
Y-Decoder
X-Decoder
Y-Decoder
Cell Array
Data Latch/
Sense Amps
Input/Output
Buffers
Sector Switches
DQ0-DQ15(A-1)
RY/BY#
Write
State
Machine
WE
#
ESI
ESI
Pin Description
A0-A19 20 Addresses
DQ0-DQ14 15 Data Inputs/Outputs
DQ15/A-1
DQ15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)
CE# Chip Enable
OE# Output Enable
WE# Write Enable
RESET# Hardware Reset Pin, Active Low
BYTE# Selects 8-bit or 16-bit mode
RY/BY# Ready/Busy Output (N/A SO 044)
Vcc
3.0 volt-only single power supply
(see Product Selector Guide for speed options and voltage supply tolerances)
Vss Device Ground
NC Pin Not Connected Internally