User Guide
27
DHT-500SD
TP2150B(AMP:IC53,63,73)
AGND
Y2B
NC
NC
OCD2
CSS
NC
OCD1
V5
AGND
NC
NC
NC
Y2
NC
Y1
Y1B
NC
NC
NC
NC
OCS2LP
NC
NC
NC
OCS1LN
OCS1LP
NC
NC
52
2658
57
55
54
56
53
27
28
29
NC
OCS2LN
VBOOT2
VBOOT1
32
31
30
NC
SLEEP
NC
SMPSO
SW-FB
64
63
61
60
62
59
NC
NC
NC
NC
NC
20
21
22
23
NC
NC
25
24
1
14131110 12
98765432 191716 1815
45 44 42 4143
40 39 38
37
36 35 34 33
51 50 48 4749
46
OCS1HN
NC
LO2
VN10
VNN
VN10
LO1
LO1COM
NC
HO1COM
HO1
NC
OCS1HP
LO2COM
OCS2HN
NC
HO2
HO2COM
OCS2HP
TP2150B Pin Description
Pin Function Description
2,5 AGND Analog ground.
6 V5 5V power supply input.
7 OCD1 Over-current threshold output (Channel 1)
9 CSS Soft startup for VN10 controller, this pin should be tied to V5
10 OCD2 Over-current threshold output (Channel 2)
13,17 Y2, Y1 Non-inverted switching modulator inputs
14,16 Y2B, Y1B Inverted switching modulator inputs
27,57 VBOOT2, VBOOT1 Bootstrapped voltage to supply drive to gate of high-side FET
(Channel2&1)
30,31 OCS2LP, OCS2LN Over Current Sense inputs, Channel 2 low-side
33,34 OCS2HP, OCS2HN Over Current Sense inputs, Channel 2 high-side
36,48 HO2, HO1 High side gate drive output (Channel 2 & 1)
37,47 HO2COM, HO1COM Kelvin connection to source of high-side transistor (Channel 2 & 1)
39,45 LO2COM, LO1COM Kelvin connection to source of low-side transistor (Channel 2 & 1)
40,44 LO2, LO1 Low side gate drive output (Channel 2 & 1)
41,43 VN10 “Floating” supply input for the FET drive circuitry. This voltage must be stable
and referenced to VNN.
42 VNN Negative supply voltage.
50,51 OCS1HN, OCS1HP Over Current Sense inputs, Channel 1 high-side
53,54 OCS1LN , OCS1LP Over Current Sense inputs, Channel 1 low-side
59 SW-FB Feedback for regulating switching power supply output for VN10
60 SMPSO Switching power supply output for VN10
62 SLEEP This pin is active high. Tie this pin to GND for normal operation. Tie this pin to
+5V to place the part in sleep mode.
1,3,4,8,
11,12,15,
18,19,20,
21,22,23,
24,25,26,
28,31,32,
35,38,46,
49,52,53,
56,58,61,
63,64
NC Not connected (bonded) internally. Please refer to the Application/Test circuit
for details on the how to connect these pins.