User Guide

30
30
DCD-SA100
M30624FGNGP Port Assignment
Pin Port Function I/O Initial Mode Action Note 備考
(USER1:Ｈ/USER2:Ｈ)
1 P94/DA1/TB4IN P94 O H MULT_LED MULTI SURROUND(LED L=ON) MULTI SURROUND(LED
L=ON)
2 P93/DA0/TB3IN P93 O H DSCS1 CHIP SELECT for FRONT DAC
3 P92/TB2IN/SOUT3 SOUT3 O H DSDO CONTOROL SERIAL DATA for
ALL DAC
DCD1792/DXP7001 の
control data
4 P91/TB1IN/SIN3 P91 I USER1 MODEL SELECT 1 Ｈ
5 P90/TB0IN/CLK3 CLK3 O H DSCLK DATA CLOCK for ALL DAC DSD1792/DXP7001 の
control data clock
6 BYTE BYTE I BYTE PULL UP(8bit)
7 CNVss CNVss I CNVSS PULL DOWN （5.6k ohm)
8 P87/XCIN P87 O H DSCS2 CHIP SELECT for SURROUND
DAC
DCD1792 の SURROUND
ch chip select
9 P86/XCOUT P86 O H DSCS3 CHIP SELECT for DXP7001 DAC DXP7001 chip select
10 RESET~ RESET~ I RESET RESET INPUT
11 XOUT XOUT O X.TAL OSC OUT
12 VSS VSS - VSS GND
13 XIN XIN I X.TAL OSC IN
14 VCC VCC - 3.3V POWER INPUT
15 P85/NMI~ P85 I P_UP1 10K PULL UP(NON CONECT) NOT USE
16 P84/INT2~ INT2~ I/O IR_IN IR INPUT SIGNAL(Ma:RC-5/
De:SHARP FORMAT)
IR remote control の
input
17 P83/INT1~ INT1~ I MINT INT from CXD1885Q
18 P82/INT0~ INT0~ I DRVIRQ CXD1885Q DATA REQUEST
19 P81/TA4IN/U~ P81 O L FS_SW DAC SYSTEM F78CLK SWITCH
SIGNAL(384fs/192fs)
CD 時 :Low に固定
(384fs)SACD 時 :High に
固定 (192fs)
20 P80/TA4OUT/U TA4OUT O L PWM TRAY CONTROL PWM SIGNAL
21 P77/TA3IN P77 O H SELDSD SELECT for DSD SIGNAL(PLD)
22 P76/TA3OUT P76 O H SMUTE MUTING for CXD2753R
23 P75/TA2IN/W~ P75 O H DSDRST RESET for CXD2753R
24 P74/TA2OUT/W P74 I MSREADY SERIAL DATA READY from
CXD2753R
25 P73/CTS2~/RTS2~/
TA1IN/V~
P73 O H XMSLAT SERIAL DATA LATCH for
CXD2753R
26 P72/CLK2/TA1OUT/V CLK2 O H MSCK SERIAL DATA CLK for
CXD2753R
27 P71/RXD2/SCL/
TA0IN/TB5IN
RXD2 I MSDATAO SERIAL DATA INPUT from
CXD2753R
PULL UP
28 P70/TXD2/SDA/
TA0OUT
TXD2 O H MSDATI SERIAL DATA OUTPUT for
CXD2753R
PULL UP
29 P67/TXD1 P67 O H CD_LED FOR CD SELECT (LED L:ON) Flash(w:
pull up)
30 P66/RXD1 P66 O H SA_LED FOR SACD SELECT (LED L:ON) Flash(w:
pull up)
31 P65/CLK1 P65 O H PULL_DWN 5.1K PULL DOWN(NON
CONECT)
Flash(w:
pull
down)
32 P64/CTS1~/RTS1~/
CTS0~/CLKS1
P64 O H DRVRST RESET for CXD1885Q(RESET=L) Flash(w:
pull up)
33 P63/TXD0 TXD0 O H DRVRX SERIAL DATA for CXD1885Q
34 P62/RXD0 RXD0 I DRVTX SERIAL DATA from CXD1885Q
35 P61/CLK0 CLK0 O H DRVCLK DATA CLOCK for CXD1885Q
36 P60/CTS0~/RTS0~ CTS0~ I DRVRDY DATA READY SIGNAL from
CXD1885Q
37 P57/RDY~/CLKOUT RDY~ I MRDY READY from CXD1885Q