User's Manual

UMAC Turbo CPU/Communications Board Hardware Manual
Introduction 2
Board Configuration
Base Version
The base version of the UMAC Turbo CPU/Communications Board without options provides a single
board 160 mm wide and 100 mm high for a 20 mm slot with:
 80 MHz DSP56303 CPU (120 MHz PMAC equivalent) (fast internal memory for first 15 axes servo
and commutation)
 128k x 24 SRAM compiled/assembled program memory (5C0) (for firmware, compiled PLCs, user-
written servo and phase)
 128k x 24 SRAM user data memory (5C0) (for motion and uncompiled PLC programs, variables,
tables, and buffers)
 1M x 8 flash memory for user backup & firmware (5C0) version
 Latest released firmware
 100 Mbit/sec UDP/IP, TCP/IP Ethernet Communications Interface
 480 Mbit/sec USB 2.0 Communications Interface (USB 1.1 compatible)
 Two RS-232 serial interfaces with IDC 10-pin front connector
 PID/notch/feedforward servo algorithms
 Extended pole-placement servo algorithms
 1-year warranty from date of shipment (External cables not included)
Option 2B: Dual-Ported RAM
Dual-ported RAM provides a high-speed communications path for bus communications with the host
computer through a bank of shared memory. DPRAM is advised if more than 100 data items per second
will be passed between the controller and the host computer in either direction.
 Option 2B provides the Dual-Ported RAM for PC/104, USB, or Ethernet interface
Option 5: CPU and Memory Configurations
The various versions of Option 5 provide different CPU speeds and main memory sizes. Only one Option
5xx may be selected for the board.
 Option 5C0 is the standard CPU and memory configuration. It is provided automatically if no Option
5xx is specified. It provides an 80 MHz DSP56303 CPU w/8Kx24 internal memory, 128Kx24
SRAM compiled/ assembled program memory, 128Kx24 SRAM user data memory, 1Mx8 flash
memory.
 Option 5C3 provides an 80 MHz DSP56303 CPU w/8Kx24 internal memory, expanded 512Kx24
SRAM compiled/assembled program memory, expanded 512Kx24 SRAM user data memory, 4Mx8
flash memory.
 Option 5D0 provides a 100 MHz DSP56309 CPU w/34Kx24 internal memory, 128Kx24 SRAM
compiled/ assembled program memory, 128Kx24 SRAM user data memory, 1Mx8 flash memory.
 Option 5D3 provides a 100 MHz DSP56309 CPU w/34Kx24 internal memory, expanded 512Kx24
SRAM compiled/assembled program memory, expanded 512Kx24 SRAM user data memory, 4Mx8
flash memory.
 Option 5E0 provides a 160 MHz DSP56311 CPU w/128Kx24 internal memory, 128Kx24 SRAM
compiled/ assembled program memory, 128Kx24 SRAM user data memory, and 1Mx8 flash
memory. Requires V1.939 or newer firmware.
 Option 5E3 provides a 160 MHz DSP56311 CPU w/128Kx24 internal memory, expanded 512Kx24
SRAM compiled/assembled program memory, expanded 512Kx24 SRAM user data memory, and
4Mx8 flash memory. Requires V1.939 or newer firmware.