User's Manual

PMAC Dual-Ported RAM User Manual

24 Dual-Ported RAM Automatic Functions

Background Variable Data Write Buffer

The Background Variable Data Write Buffer is essentially the opposite of the Background Variable Data

Read Buffer described above. It allows the user to write to up to 32 user-specified registers or particular

bits in registers to PMAC without using a communications port (PC Bus, serial, or DPRAM ASCII I/O).

This allows the user to set any PMAC variable without using an ASCII command such as M1=1 and

without worrying about an open Rotary Buffer.

This function is controlled by I55. It is available starting with firmware version 1.15G. PLCC function

blocks are available starting with firmware version 1.16.

General Description

The buffer has two parts. The first part is the header: two 16-bit words (four host addresses) containing

handshake information and defining the location and size of the rest of the table. This is at a fixed location

in DPRAM (PMAC address $D1F5 as shown in the table at the end of this section). The second part

contains the address specifications of the PMAC registers to be copied into PMAC. It occupies six 16-bit

words (twelve host addresses) for each PMAC location to be written to, starting at the location specified in

the header.

Enabling

To start operation of this buffer:

1. Write the starting location of the second part of the buffer into register 0x07E8 (X:$D1F5). This

location is expressed as a PMAC address, and it must be between $D200 and $DFFD.

2. Starting at the DPRAM location specified in the above step, write the PMAC addresses of the

registers to be copied, and the register types. The first 16-bit word is the PMAC address of the first

and offset for writing to the PMAC register. The third, fourth, fifth, and sixth words specify the data

to be written.

Note:

If address 0 is specified, it will be writing into PMAC’s servo clock register and

will cause PMAC’s watchdog timer to trip.

3. Write a number representing the size of the buffer into register 0x07E6. (Y:$D1F5). This value must

be between 1 and 32. When PMAC sees that this value is greater than zero, it is ready to start

copying the registers you have specified into PMAC. When it is finished it will change the value in

this register to a 0.

4. Set I55 to 1. This enables both the background variable data read function and the background

variable data write function.

Procedure

In operation, PMAC will copy the data from the buffer into PMAC during the background cycle whenever

Y:$D1F5 is a not zero. If this register is 0 it will assume that the host has not finished placing the data in

the buffer and will not write to PMAC. Once this register is set to a number from 1 to 32 it will copy that

many registers, starting at the start of the header start address information, from the DPRAM to PMAC.

When PMAC is done copying the specified registers, it sets register Y:$D1F5 to zero to let the host know

that it has completed a cycle.

When the host wants to update this buffer, it should check to see that Y:$D1F5 is zero. When it is done, it

should setup the address/data structure. Then set Y:$D1F5 to the number of registers to copy to PMAC to

let PMAC know that it can perform another cycle.