User's Manual

PMAC2 User Manual

Setting Up PMAC2 for Direct PWM Control 19

I10 tells the PMAC2 interpolation routines how much time there is between servo clock cycles. It must

be changed any time I900, I901, or I902 is changed. I10 can be set according to the formula:

()()()

1902I1901I3900I*2

640

10I +++=

Hardware Clock Frequency Control: I903, I908

I903 determines the frequency of four hardware clock signals use for machine interface channels 1-4;

I907 does the same for machine interface channels 5-8. These can probably be left at the default values.

The four hardware clock signals are SCLK (encoder sample clock), PFM_CLK (pulse frequency

modulator clock, DAC_CLK (digital-to-analog converter clock), and ADC_CLK (analog-to-digital

converter clock).

Only the ADC_CLK signal is directly used with the digital current loop, to control the frequency of the

serial data stream from the current-loop ADCs. The ADC clock frequency must be at least 96 times

higher than the PWM frequency, but it must be within the capability of the serial ADCs. Refer to the

I903 and I908 descriptions for detailed information on setting these variables.

The encoder SCLK frequency should be at least 20% greater than the maximum count (edge) rate that is

possible for the encoder on any axis. Higher SCLK frequencies than this minimum may be used, but

these make the digital delay anti-noise filter less effective.

PWM Deadtime Control: I904, I908

I904 determines the PWM deadtime between top and bottom signals on for machine interface channels 1-

4; I908 does the same for machine interface channels 5-8. I904 and I908 have a range of 0 to 255, and the

deadtime is 0.135 usec time the I-variable value. The deadtime should not be set smaller than the

recommended minimum for the drive, or excessive drive heating could occur. Too large a deadtime value

can cause unresponsive performance. The default value of 15, which produces a deadtime of 2.0 usec, is

large enough to protect almost all drives, and small enough not to create unresponsive performance unless

PWM frequencies are extremely high.

Parameters to Set up Per-Channel Hardware Signals

For each machine interface channel n (n = 1 to 8) used for PWM outputs, a few I-variables must be set up

properly.

I9n0 must be set up to decode the commutation encoder properly. Almost always a value of 3 or 7 is used

to provide times-4 decode of a quadrature encoder. The difference between 3 and 7 is the direction sense

of the encoder; a test described below allows you to evaluate the direction you want.

I9n6 must be set to 0 to specify all 3 outputs A, B, and C are in PWM format for a 3-phase motor. If only

two PWM output pairs are used (for a 1, 2, or 4-phase motor), I9n6 could also be set to 2, permitting the

C-outputs to be PFM format for other uses.

I9n7 controls whether the PWM output signals are inverted or not. At the default value of 0 (non-

inverted) the transistor-on signals are high (+5V) on the PWM+ lines, and low on the PWM- lines. This

setting will be used for almost all PWM drives.

Parameters to Set up Motor Operation

Several I-variables must be set up for each Motor x to enable and configure the digital current loop for

that motor. Of course, Ix00 must be set to 1 for any active motor, regardless of whether digital current

loop is used for that motor or not.