User's Manual
PMAC VME Hardware Reference Manual
PMAC VME E-Point Descriptions 5
E28: Warning Following Error/Watchdog Timer Signal Control
E Point and
Physical Layout
Location Description Default
E28
B3 Jump pin 1 to 2 to allow warning following error
(Ix12) for the selected coordinate system to control
FEFCO/ on J8-57.
Jump pin 2 to 3 to cause Watchdog timer output to
control FEFCO/ (low true output in either case).
2-3 Jumper
installed
E29 - E33: Phase Clock Frequency Control
Jumpers E29 through E33 control the speed of the phase clock, and, indirectly, the servo clock, which is
divided down from the phase clock (see E3 - E6). No more than one of these five jumpers may be on at a
time.
Phase Clock Frequency
Default and
Physical Layout
E29 E30 E31 E32 E33
19.6608 MHz
Master Clock
See Note 1
29.4912 MHz
Master Clock
See Note 2
E33 E32 E31 E30 E29
Location: All B4
ON OFF OFF OFF OFF 2.26 kHz 3.39 kHz
OFF ON OFF OFF OFF 4.52 kHz 6.78 kHz
OFF OFF ON OFF OFF 9.04 kHz 13.55 kHz
OFF OFF OFF ON OFF 18.07 kHz 27.10 kHz
OFF OFF OFF OFF ON 36.14 kHz 54.21 kHz
1. True for standard 20 MHz PMAC and those with Options 4A, 5A, and 5B
2. True only for PMACs with Option 5
Note:
If jumper E98 has been changed to connect pins 2-3 (default is 1-2), the phase
clock frequency is exactly 1/2 that shown in the above table.
Note:
If E40-E43 are set so that the card has a software address other than @0, the phase
clock signal must be received over the serial port from card @0, so these jumpers
have no effect.
E34 - E38: Encoder Sampling Clock Frequency Control
Jumpers E34 - E38 control the encoder sampling clock (SCLK) used by the gate array ICs. No more than
1 of these 5 jumpers may be on at a time.
SCLK Clock Frequency
E34 E35 E36 E37 E38
19.6608 MHz
Master Clock
See Note 1
29.4912 Mhz
Master Clock
See Note 1
Default and
Physical Layout
ON OFF OFF OFF OFF 9.8304 MHz 14.7456 MHz
E34
OFF ON OFF OFF OFF 4.9152 MHz 7.3728 MHz
E35
OFF OFF ON OFF OFF 2.4576 MHz 3.6864 MHz
E36
OFF OFF OFF ON OFF 1.2288 MHz 1.8432 MHz
E37
OFF OFF OFF OFF ON External clock 1 to 30 mhz maximum
input on CHC4 & CHC4/
E38
Location: All B4
1. True for standard 20 MHz PMAC and those with Options 4A, 5A, and 5B
2. True only for PMACs with Option 5.