Reference Manual

PMAC PCI-Lite Hardware Reference Manual
4 Hardware Setup
Clock Configuration Jumpers
E3-E6: Servo Clock Frequency Control –Jumpers E3 – E6 determine the servo-clock frequency by
controlling how many times it is divided down from the phase-frequency. The default setting of E3 and
E4 OFF, E5 and E6 ON divides the phase-clock frequency by four, creating a 2.25kHz servo-clock
frequency. This setting is seldom changed.
E29-E33: Phase Clock Frequency Control – Only one of the jumpers E29 – E33, which select the
phase-clock frequency, may be on in any configuration. The default setting of E31 ON, which selects a
9kHz phase-clock frequency, is seldom changed.
E34-E38: Encoder Sample Clock – Only one of the jumpers E34 – E38, which select the encoder
sample clock frequency, may be on in any configuration. The frequency must be high enough to accept
the maximum true count rate (no more than one count in any clock period), but a lower frequency can
filter out longer noise spikes. The anti-noise digital delay filter can eliminate noise spikes up to one
sample-clock cycle wide.
E40-43: Servo and Phase Clock Direction Control – Jumpers E40 – E43 determine the direction of the
phase and servo clocks: all of these jumpers must be ON for the card to use its internally generated clock
signals and to output these on the serial port connector. If any of these jumpers is OFF, the card will
expect to input these clock signals from the serial port connector, and its watchdog timer will trip
immediately if it does not receive these signals. The card number (0 – 15) for serial addressing of
multiple cards on a daisychain serial cable is determined by the PMAC variable I0. See the Software
Setup section in this manual for details.
E48: Option CPU Clock Frequency Control – If variable I46 is saved at a value greater than 0, I46
will determine the CPU’s operational frequency (recommended). For backward compatibility, if I46 is
saved at a value of 0, the CPU will operate at 40MHz if E48 is OFF, or at 60MHz if E48 is ON.
E98: DAC/ADC Clock Frequency Control – Leave E98 in its default setting of 1-2, which creates a
2.45MHz DCLK signal, unless connecting an Acc-28 A/D-converter board. In this case, move the
jumper to connect pins 2 and 3, which creates a 1.22MHz DCLK signal.
Encoder Configuration Jumpers
Encoder Complementary Line Control – The selection of the type of encoder used either single-ended
or differential is made through the resistor packs configuration and not through a jumper configuration, as
on older PMAC designs.
E22-E23: Control-Panel Handwheel Enable – Putting these jumpers ON ties the handwheel-encoder
inputs on the JPAN control-panel port to the Channel 2 encoder circuitry. If the handwheel inputs are
connected to Channel 2, no encoder should be connected to Channel 2 through the JMACH connector.
E72-E73: Control Panel Analog Input Enable – Putting these jumpers ON ties the output of the Option
10 voltage-to-frequency converter that can process the Wiper analog input on the JPAN control panel port
to the Channel 4 encoder circuitry. If the frequency signal is connected to Channel 4, no encoder should
be connected to Channel 4 through the JMACH connector.
E74-E75: Encoder Sample Clock Output – Putting these jumpers ON ties the encoder sample-clock
signal to the CHC4 and CHC4/ lines on the JMACH port. This permits the clock signal to be used to
synchronize external encoder-processing devices like the Acc-8D Option 8, interpolator board. With
these jumpers ON, no encoder input signal should be connected to these pins.