Datasheet

S24SE/S24DE series
10W Single/Dual Output DC/DC Converter
DS_ S24SE/S24DE 10W _ 06032014 E-mail:[e-mail]
http://www.deltaww.com/dcdc
P7
DESIGN CONSIDERATIONS
Input Source Impedance
The impedance of the input source connecting to the
DC/DC power modules will interact with the modules
and affect the stability. A low ac-impedance input source
is recommended. If the source inductance is more than
a few μH, we advise a 47μF electrolytic capacitor
mounted close to the input of the module to improve the
stability.
Input Reflected Ripple Current
Vin+
Vin-
is
ic
100uF,
ESR=0.2 ohm @
25
o
C 100KHz
Cs: 220uF
+ +
Vin+
Vin-
is
ic
100uF,
ESR=0.2 ohm @
25
o
C 100KHz
Cs: 220uF
+ +
is
ic
100uF,
ESR=0.2 ohm @
25
o
C 100KHz
Cs: 220uF
++ ++
Test set-up diagram showing measurement points for
Input Terminal Ripple Current and Input Reflected
Ripple Current.
Measured input reflected-ripple current with a simulated
source Inductance (LTEST) of 12 μH. Capacitor Cs
offset possible battery impedance.
Input Terminal Ripple Current, ic, at full rated output
current and nominal input voltage with 12µH source
impedance and 100µF electrolytic capacitor (20 mA/div,
2us/div).
Input reflected ripple current, is, through a 12µH source
inductor at nominal input voltage and rated load current
(5 mA/div, 2us/div)
Output Ripple Noise
Output voltage ripple test setup.
Load capacitance: 1µF ceramic capacitor and 10µF
tantalum capacitor. Bandwidth: 20 MHz. Scope
measurements should be made using a BNC cable
(length shorter than 20 inches). Position the load
between 51 mm to 76 mm (2 inches to 3 inches) from
the module.