User's Manual

DFZM-TS2xx
Data Sheet Sheet 22 of 37 AUG 22, 2013
Proprietary Information and Specifications are Subject to Change
5-7.ADC Parameters
Test Conditions: T
A
=25 ºC, VCC=3.0V
Parameter Test Condiction Min Typ Max Unit
Input voltage 0 VCC
V
External reference voltage 0 VCC
V
External reference voltage
differential
0 VCC
V
Input resistance, signal Using 4-MHz clock speed 197
kΩ
Full-scale signal(1) Peak-to-peak, defines 0 dBFS 2.97
V
Single-ended input, 7-bit setting 5.7
Single-ended input, 9-bit setting 7.5
Single-ended input, 10-bit setting 9.3
Single-ended input, 12-bit setting 10.8
Differential input, 7-bit setting 6.5
Differential input, 9-bit setting 8.3
Differential input, 10-bit setting 10.0
ENOB(1)
Effective number of bits
Differential input, 12-bit setting 11.5
bits
Useful power bandwidth 7-bit setting, both single and differential 0 20
KHz
Single-ended input, 12-bit setting, –6 dBFS -75.2 THD(1)
Total harmonic distortion
Differential input, 12-bit setting, –6 dBFS -86.6
dB
Single-ended input, 12-bit setting 70.2
Differential input, 12-bit setting 79.3
Single-ended input, 12-bit setting, –6 dBFS 78.8
Signal to nonharmonic ratio(1)
Differential input, 12-bit setting, –6 dBFS 88.9
dB
CMRR
Common-mode rejection ratio
Differential input, 12-bit setting, 1-kHz sine (0
dBFS), limited by ADC resolution
84
dB
Crosstalk
Differential input, 12-bit setting, 1-kHz sine (0
84
dB