DFZM-TS2xx Data sheet DFZM-TS2xx An IEEE 802.15.
DFZM-TS2xx Contents 1. Features ............................................................................................................................................... 4 2. Zigbee Model No. Definition.............................................................................................................. 6 3. Architecture......................................................................................................................................... 7 3-1.Block Diagram..............
DFZM-TS2xx Revision History Version Date Reason of change Maker 0.1 2013/3/11 Initial release Fred 0.2 2013/4/26 Add Peripheral I/O Pin Mapping Fred 0.3 2013/7/1 0.4 2013/8/22 Update power consumption and radio parameters Data Sheet Add “Not available for DFZM-TS21X-DT0R” at 4-2.
DFZM-TS2xx DFZM-TS2xx IEEE802.15.4 System-On-Chip Zigbee Module T HIS DOCUMENT describes the DFZM-TS2xx Zigbee module hardware specification. The CC2530 based modules provide cost effective, low power, and flexible platform to add Zigbee connectivity for embedded devices for a variety of applications, such as wireless sensors and energy monitoring.
DFZM-TS2xx • FCC/NCC Certified. DFZM-TS220 DFZM-TS221 DFZM-TS210 DFZM-TS211 FCC ID H79DFZM-TS220 H79DFZM-TS220 TBD TBD NCC ID CCAJ12LP2570T7 CCAJ12LP2571T9 TBD TBD ► Microcontroller: • High-Performance and Low Power 8051 Microcontroller core with code prefetch . • 256KB In-Syctem-Programmable Flash. • 8KB RAM with Retention in all power mode. • Hardware debug support. ► Interfaces: • Chip antenna or external antenna options.
DFZM-TS2xx 2. Zigbee Model No. Definition D F Z M - T S 2 2 0 Data Sheet - DT 0 R Sheet 6 of 37 Free-lead E=Pb free R=RoHS N=NG L=Process with Lead Serial no. 0~9 then A~Z Customer code DT= Delta Define Antenna Version 0= External Antenna 1= Onboard Chip Antenna Power Version 1= High Power 2= Low Power Frequency 2= 2.
DFZM-TS2xx 3. Architecture 3-1.
DFZM-TS2xx 3-2.Block Diagram Description 3-2-1.Overview DFZM-TS2xx module is a highly integrated Zigbee system-on-chip (SOC) that contains the following: • The module includes TI CC2530 SoC, which contains CPU- and memory-related, peripherals-related, clocks and power management-related in a single package. • The module features an IEEE802.15.4-compliant radio transceiver with onboard 32 KHz & 32 MHz crystal circuitries, RF, and certified chip antenna or external antenna options.
DFZM-TS2xx physical memory. The 8-KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces. The 8-KB SRAM is an ultralow-power SRAM that retains its contents even when the digital part is powered off (power modes 2 and 3). This is an important feature for low-power applications. The 256 KB flash block provides in-circuit programmable non-volatile program memory for the device, and maps into the CODE and XDATA memory spaces.
DFZM-TS2xx as an input or output and if a pullup or pulldown resistor in the pad is connected. CPU interrupts can be enabled on each pin individually. Each peripheral that connects to the I/O pins can choose between two different I/O pin locations to ensure flexibility in various applications. A versatile five-channel DMA controller is available in the system, accesses memory using the XDATA memory space, and thus has access to all physical memories.
DFZM-TS2xx The ADC supports 7 to 12 bits of resolution in a 30 kHz to 4 kHz bandwidth, respectively. DC and audio conversions with up to eight input channels (Port 0) are possible. The inputs can be selected as single-ended or differential. The reference voltage can be internal, AVDD, or a single-ended or differential external signal. The ADC also has a temperature-sensor input channel. The ADC can automate the process of periodic sampling or conversion over a sequence of channels.
DFZM-TS2xx Note that peripheral units have two alternative locations for their I/O pins; see Table 3-1. Priority can be set between peripherals if conflicting settings regarding I/O mapping are present . All combinations not causing conflicts can be used.
DFZM-TS2xx 3-3.Power Management Different operating modes, or power modes, are used to allow low-power operation. Ultralow-power operation is obtained by turning off the power supply to modules to avoid static (leakage) power consumption and also by using clock gating and turning off oscillators to reduce dynamic power consumption. The five various operating modes (power modes) are called active mode, idle mode, PM1, PM2, and PM3 (PM1/PM2/PM3 are also referred to as sleep modes).
DFZM-TS2xx PM2: The voltage regulator to the digital core is turned off. Neither the 32MHz XOSC nor the 16MHz RCOSC is running. Either the 32KHz RCOSC or the 32KHz XOSC is running. PM2 has the second-lowest power consumption. In PM2, the power-on reset, external interrupts, selected 32KHz oscillator, and Sleep Timer peripherals are active. I/O pins retain the I/O mode and output value set before entering PM2. All other internal circuits are powered down. The voltage regulator is also turned off.
DFZM-TS2xx 4. Pin-out and Signal Description 4-1.
DFZM-TS2xx 4-2.Module Pins Description Pins Name Pin Type Description 1 GND Ground Ground 2 GND Ground Ground 3 GND Ground Ground 4 P2_2 Digital I/O Port 2.2, Debug Clock 5 P2_1 Digital I/O Port 2.1, Debug Data 6 P2_0 Digital I/O Port 2.0 7 P1_7 Digital I/O Port 1.7 8 P1_6 Digital I/O Port 1.6 9 P1_5 Digital I/O Port 1.5 10 P1_4 Digital I/O Port 1.4 (Not available for DFZM-TS21X-DT0R) 11 P1_3 Digital I/O Port 1.3 12 P1_2 Digital I/O Port 1.
DFZM-TS2xx 28 Data Sheet GND Ground Ground Sheet 17 of 37 AUG 22, 2013 Proprietary Information and Specifications are Subject to Change
DFZM-TS2xx 5. Electrical Characteristics 5-1.Absolute Maximum Rating Conditions beyond those cited in Table 5-1 may cause permanent damage to the DFZM-TS2xx, and must be avoided. Parameter Minimum Maximum Unit Supply voltage(VCC) -0.3 3.9 V Storage temperature range -40 125 ºC Voltage on any digitai I/O -0.3 VCC+0.3, ≤3.9 V Table 5-1: Absolute Maximum Ratings 5-2.
DFZM-TS2xx Medium CPU activity: normal flash access(1), no RAM access 32MHz XOSC running, radio in RX mode, –50dBm input 20.
DFZM-TS2xx Burst write peak current 6 mA Table 5-3: Poewr Consumption (1) Normal flash access means that the code used exceeds the cache storage, so cache misses happen frequently. 5-4.DC Characteristics Test Conditions: TA=25 ºC, VCC=3.0V Parameter Test conditions Min Typ Max Unit 0.5 V Logic-0 input voltage Logic-1 input voltage 2.
DFZM-TS2xx Parameter Test conditions Min Typ With 32-MHz XOSC initially on RX/TX and TX/RX turnaround Max Unit 192 us 192 us Table 5-5: Wake-up and Timing 5-6.Radio Parameters Test Conditions: TA=25 ºC, VCC=3.0V Parameter Min RF Frequency range 2394 Typ Max Unit 2507 MHz Radio baud rate 250 Kbps Radio chip rate 2 Mchip/s Flash erase cycles 20 Flash page size 2 Notes K cycles KB TX/RX specification for DFZM-TS22x Output power 2 Error vector magnitude (EVM) 3.2 4.
DFZM-TS2xx 5-7.ADC Parameters Test Conditions: TA=25 ºC, VCC=3.0V Parameter Test Condiction Min Typ Max Unit Input voltage 0 VCC V External reference voltage 0 VCC V 0 VCC V External reference voltage differential Input resistance, signal Using 4-MHz clock speed 197 kΩ Full-scale signal(1) Peak-to-peak, defines 0 dBFS 2.97 V Single-ended input, 7-bit setting 5.7 Single-ended input, 9-bit setting 7.5 Single-ended input, 10-bit setting 9.
DFZM-TS2xx dBFS), limited by ADC resolution Offset Midscale Gain error -3 mV 0.68 % DNL(1) 12-bit setting, mean 0.05 Differential nonlinearity 12-bit setting, maximum 0.9 INL(1) 12-bit setting, mean 4.6 Integral nonlinearity 12-bit setting, maximum 13.3 Single-ended input, 7-bit setting 35.4 Single-ended input, 9-bit setting 46.8 Single-ended input, 10-bit setting 57.5 SINAD(1) (–THD+N) Single-ended input, 12-bit setting 66.
DFZM-TS2xx 5-8.SPI AC Characteristics Test Conditions: TA= -40~85 ºC, VCC= 2.0~3.
DFZM-TS2xx Figure 5-1: SPI Master AC Characteristics Figure 5-2: SPI Slave AC Characteristics Data Sheet Sheet 25 of 37 AUG 22, 2013 Proprietary Information and Specifications are Subject to Change
DFZM-TS2xx 6. Package and Layout Guidelines 6-1.
DFZM-TS2xx Figure 6-2: DFZM-TS22x Module Dimensions (in mm) Data Sheet Sheet 27 of 37 AUG 22, 2013 Proprietary Information and Specifications are Subject to Change
DFZM-TS2xx Figure 6-3: DFZM-TS21x Module Recommended PCB Footprint (in mm) Data Sheet Sheet 28 of 37 AUG 22, 2013 Proprietary Information and Specifications are Subject to Change
DFZM-TS2xx Figure 6-4: DFZM-TS21x Module Dimensions (in mm) Data Sheet Sheet 29 of 37 AUG 22, 2013 Proprietary Information and Specifications are Subject to Change
DFZM-TS2xx 6-2.Layout Guidelines Keep out area for onboard chip antenna. All layers on the PCB must be clear. (i.e. No GND, Power trace/plane, traces.) Note1: If guidelines are not followed, DFZM-TS2xx range with onboard chip antenna will be compromised. Note2: If the user has accounted for power concumption, module outline and onboard chip antenna keep out for DFZM-TS221, then DFZM-TS211 can also be accomodated on the same end application board foot print.
DFZM-TS2xx Figure 6-6: Recommended keep out area to accommodate both DFZM-TS221 and DFZM-TS211 Notes: 1. All Dimensions are in mm. Tolerances shall be ±0.10 mm. 2. Absolutely no metal trace or ground layer underneath this area. 3. It is recommended not to run circuit traces underneath the module. 4. In performing SMT or manual soldering of the module to the base board, please align the two row of pins.
DFZM-TS2xx Do not use a metallic or metalized plastic for the end product enclosure. Recommendation is to keep plastic enclosure clearance of 1cm from top and bottom of the DFZM-TS2xx onboard chip antenna keep-out area, if possible. 5-mm (0.2 in) clearance shall be the minimum as shown in Figure 6-7. Figure 6-7 Recommended clearance above and below the PCB trace antenna 6-2-1.Surface Mount Assembly The reflow profile is shown in Figure 6-8.
DFZM-TS2xx Note: 1. Perform adequate test in advance as the reflow temperature profile will vary accordingly to the conditions of the parts and boards, and the specifications of the reflow furnace. 2. Be careful about rapid temperature rise in preheat zone as it may cause excessive slumping of the solder paste. 3. If the preheat is insufficient, rather large solder balls tend to be generated. Conversely, if performed excessively, fine balls and large balls will generate in clusters at a time. 4.
DFZM-TS2xx 6-3.Recommended Stencil Aperture Note: The thickness of the stencil should be 0.15mm over this area.
DFZM-TS2xx Figure 6-9: DFZM-TS21x recommended stencil aperture Data Sheet Sheet 35 of 37 AUG 22, 2013 Proprietary Information and Specifications are Subject to Change
DFZM-TS2xx 7. Ordering Information DEVICE DESCRIPTION ORDERING NUMBER Extended range module using external antenna DFZM-TS210-DT0R Extended range module using onboard chip antenna DFZM-TS211-DT0R Low power module using external antenna DFZM-TS220-DT0R Low power module using onboard chip antenna DFZM-TS211-DT0R 8. Federal Communications Commission (FCC) Statement 15.
DFZM-TS2xx -Reorient or relocate the receiving antenna. -Increase the separation between the equipment and receiver. -Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. -Consult the dealer or an experienced radio/TV technician for help. This device complies with Part 15 of the FCC Rules.
