Quick start manual

Inline assembly code 13-3
Assembler statement syntax
Instruction opcodes
The built-in assembler supports all of the Intel-documented opcodes for general
application use. Note that operating system privileged instructions may not be
supported. Specifically, the following families of instructions are supported:
• Pentium family
•Pentium Pro and Pentium II
•Pentium III
•Pentium 4
In addition, the built-in assembler supports the following instruction sets
• AMD 3DNow! (from the AMD K6 onwards)
• AMD Enhanced 3DNow! (from the AMD Athlon onwards)
For a complete description of each instruction, refer to your microprocessor
documentation.
RET instruction sizing
The RET instruction opcode always generates a near return.
Automatic jump sizing
Unless otherwise directed, the built-in assembler optimizes jump instructions by
automatically selecting the shortest, and therefore most efficient, form of a jump
instruction. This automatic jump sizing applies to the unconditional jump instruction
(JMP), and to all conditional jump instructions when the target is a label (not a
procedure or function).
For an unconditional jump instruction (JMP), the built-in assembler generates a short
jump (one-byte opcode followed by a one-byte displacement) if the distance to the
target label is –128 to 127 bytes. Otherwise it generates a near jump (one-byte opcode
followed by a two-byte displacement).
For a conditional jump instruction, a short jump (one-byte opcode followed by a one-
byte displacement) is generated if the distance to the target label is –128 to 127 bytes.
Otherwise, the built-in assembler generates a short jump with the inverse condition,
which jumps over a near jump to the target label (five bytes in total). For example, the
assembly statement
JC Stop
where Stop isn’t within reach of a short jump, is converted to a machine code
sequence that corresponds to this:
JNC Skip
JMP Stop
Skip:
Jumps to the entry points of procedures and functions are always near.