Release Notes

PS Series SAN design
40 Dell PS Series Configuration Guide
8.2.1.3 Using a LAG to Connect Stacked Switches
In some situations it may become necessary to expand the PS Series SAN by using more than one single
switch stack. For example, you can link multiple stacks by creating a multi-link LACP based LAG between the
switch stacks. A simplified stack plus LAG switch configuration is illustrated in Figure 5. You should consider
the following recommendations when designing this type of SAN:
• If possible, use 10Gb or higher connections for all links between each stack.
• Distribute the links across multiple switches within each stack.
• Use LACP or another type of dynamic link aggregation protocol.
• Perform tests to determine the best hashing algorithm to use within the LAG (port channel).
Note: A multi-stack SAN infrastructure as described in this section may provide added reliability to the SAN
environment. But, it may also introduce additional latency and the potential for lower throughput. The SAN
designer will have to carefully consider the performance and reliability implications.
Using a LAG to interconnect switch stacks
8.2.2 Sizing inter-switch connections
Use the guidelines in Table 35 as a starting point for estimating inter-switch connection sizes.
Switch Interconnect Design Guidelines
Connection speeds
Interconnection guidelines
1GbE switches attached to
1GbE array controllers
1-5 arrays: 1Gb of inter-switch bandwidth per active
array controller port (up to the aggregated maximum
bandwidth of the inter switch links.
6+ arrays: Use 1-5 array rule, then add 1Gb of
additional bandwidth for each array added
10GbE switches attached to
10GbE array controllers
PS6010/PS6510 or PS4110/6110 (Random Small
Block Workloads):
1-5 arrays: 20 – 30Gb of inter-switch bandwidth
between each switch
6+ arrays: At least 6Gb of inter-switch bandwidth per
array between each switch
PS4110/PS6110 (Large Block Sequential
Workloads):