Release Notes

PS Series SAN design
37 Dell PS Series Configuration Guide
Dell EMC recommends against using QoS on the SAN switches for initiator-target communications paths.
8.2 Ethernet switches and infrastructure
Any switch used in a PS Series SAN should meet the requirements listed in this section.
Note: For a complete list of tested and validated components see the Dell EMC Storage Compatibility Matrix.
Also review the included support policy statement.
A PS Series SAN consists of one or more hosts connected to one or more PS Series arrays through a
switched Ethernet network.
Note: The minimum network configuration for a PS Series array consists of a connection between Eth0 on
each control module and a network switch. To increase performance and availability, configure multiple
network interfaces on an array and connect them to multiple switches. PS Series arrays do not support Direct
Attached Storage (DAS) configurations.
To support a high-performance PS Series SAN, switches must meet the following general requirements:
Low latency: Switches with relatively high latency may cause SAN throughput performance to
degrade, and under high load conditions they could increase the risk of dropped connections.
Non-blocking backplane design: SAN Switches should be able to provide the same amount of
backplane bandwidth to support full duplex communication on ALL ports simultaneously.
Link Layer Discovery Protocol (LLDP): If any non-array devices on the SAN network have LLDP
enabled, then the switch must have LLDP support enabled. If the SAN switch does not provide LLDP
support, then disable LLDP on all non-array devices connected to the switch. For specific instructions
on disabling LLDP on your devices, refer to the user manual of the device.
Adequate buffer space per switch port: In addition to supporting data transfers between the hosts
and the SAN, PS Series arrays also use the SAN to support inter-array communication and data load
balancing. For this reason, the more buffer space per port that a switch can provide the better. Due to
the multitude of buffer implementations used by switch vendors, Dell cannot provide definitive
guidelines as to how much is enough. Port buffers should be designed such that data is not lost when
traffic reaches extreme levels. Due to the clustered storage traffic patterns used by the PS Series
SAN architecture, switches that support “cut-through” mode are not suitable for use in a PS Series
SAN and may actually result in lower overall SAN performance.
Support for IEEE 802.3x flow control (passive and/or active) on ALL ports: Switches and
network interface controllers used in a PS Series SAN must be able to passively respond to any
“pause” frames received. All ports should have at minimum “receive”, “honor”, “respond” or “RX”
flow control enabled. Host ports should be configured as “RX” and “TX” or “symmetric” flow control
enabled. Array ports do not require TX flow control.
Support for Jumbo frames: This is not a requirement, however most iSCSI SAN implementations
should benefit from using Jumbo frames and therefore it is recommended to enable Jumbo frames.
The actual impact on SAN throughput when using jumbo frames will depend on your workload’s I/O
characteristics.
Support for Rapid Spanning Tree protocol (IEEE 802.1w), with edgeport or Cisco “PortFast
functionality if the SAN infrastructure will consist of more than two switches: For SAN
infrastructures consisting of more than 2 non-stacking switches, R-STP must be enabled on all ports
used for inter-switch trunks. All non-inter-switch trunk ports should be marked as “edge” ports or set
to “PortFast”.