Release Notes

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8. Conclusion

Balancing memory with 2

Generation EPYC

server processors increases memory

bandwidth and reduces memory access latency. When memory modules are configured

in such a way that the memory subsystems are identical, and channels are fully

populated with one or two DIMMs, one interleave set will create a single uniform

memory region that is spread across as many DIMMs as possible. This allows the

distribution of data to perform most efficiently on Dell EMC PowerEdge servers.

Applying the balanced memory guidelines demonstrated in this brief will ensure that both

memory bandwidth and memory access latency are optimized, therefore ensuring peak

memory performance within Dell EMC PowerEdge servers.

9. References

1 https://developer.amd.com/wp-content/resources/56301_1.0.pdf

2 https://www.streetdirectory.com/travel_guide/124468/hardware/computer_memory_controllers_how_they_work.html

3 https://www.computerhope.com/jargon/d/dual-channel-memory.htm

4 https://www.computerhope.com/jargon/m/memoslot.htm

5 https://www.geeksforgeeks.org/memory-interleaving/

6 https://www.amd.com/system/files/2018-03/AMD-Optimizes-EPYC-Memory-With-NUMA.pdf

7 https://developer.amd.com/wp-content/resources/56301_1.0.pdf

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