Release Notes

10 Balanced Memory with 2
nd
Generation AMD EPYC
TM
Processors for PowerEdge Servers
Figure 6: DIMM population order, starting with A1 and ending with A16
4.3 Identical CPU and DIMM Parts
Identical DIMMs must be used across all DIMM slots (i.e. same Dell part number). Dell
EMC does not support DIMM mixing in Rome systems. This means that only one rank,
speed, capacity and DIMM type shall exist within the system. This principle applies to
the processors as well; multi-socket Rome systems shall be populated with identical
CPUs.
4.4 Identical Memory Configurations for Each CPU
Every CPU socket within a server must have identical memory configurations. When
only one unique memory configuration exists across both CPU sockets within a server,
memory access is further optimized. Figure 7 below illustrates the expected memory
bandwidth curve when these rules are followed:
Figure 7: Bar graph illustrating expected performance variation as # of dimms increases
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Memory Bandwidth
#DIMMs per CPU populated
R6525 Memory Bandwidth per DIMM Population
Balanced Near-Balanced Unbalanced