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5 Dell EMC NUMA Configuration for AMD EPYC (Naples) Processors | version 1.0
1 AMD EPYC Architecture
1.1 Zeppelin Die Layout
AMD EPYC is a Multi-Chip Module (MCM) processor and per silicon package there are four Zeppelin
SOCs/dies leveraged from AMD Ryzen. Each of the four dies have direct Infinity Fabric connections to each
of the other dies as well as a possible socket-to-socket interconnect. This design allows, at most, four NUMA
nodes per socket or eight NUMA nodes in a dual sockets system
AMD EPYC processor’s four dies each have two Unified Memory Controllers (UMC), that each control one
DDR channel with two DIMMs per channel, along with one controller for IO, as shown in Figure 1 below:
DIE 0 DIE 1
DIE 2 DIE 3
Channel 0
Channel 1
Channel 4
Channel 5
Channel 2
Channel 3
Channel 6
Channel 7
UMC 0
UMC 1
UMC 0
UMC 1
UMC 0
UMC 1
UMC 0
UMC 1
IO IO
IO IO
Figure 1 Zeppelin Die Layout