Users Guide
1–Functionality and Features
Features
4 BC0054508-00 M
High-speed on-chip reduced instruction set computer (RISC) processor (see
“ASIC with Embedded RISC Processor” on page 6)
Integrated 96KB frame buffer memory
Quality of service (QoS)
Serial gigabit media independent interface (SGMII), gigabit media
independent interface (GMII), and media independent interface (MII)
management interface
256 unique MAC unicast addresses
Support for multicast addresses through a 128-bit hashing hardware
function
Serial Flash NVRAM memory
JTAG support
PCI Power Management Interface (v1.1)
64-bit base address register (BAR) support
EM64T processor support
iSCSI and FCoE boot support
Virtualization:
Microsoft
VMware
Linux
XenServer
®
Single root I/O virtualization (SR-IOV)
iSCSI
The Internet Engineering Task Force (IETF) has standardized iSCSI. SCSI is a
popular protocol that enables systems to communicate with storage devices,
using block-level transfer (that is, address data stored on a storage device that is
not a whole file). iSCSI maps the SCSI request/response application protocols
and its standardized command set over TCP/IP networks.
Because iSCSI uses TCP as its sole transport protocol, it benefits from hardware
acceleration of the TCP processing. However, iSCSI as a Layer 5 protocol has
additional mechanisms beyond the TCP layer. iSCSI processing can also be
offloaded, thereby reducing CPU utilization even further.
The Marvell BCM57xx and BCM57xxx adapters target best-system performance,
maintain system flexibility to changes, and support current and future OS
convergence and integration. Therefore, the adapter's iSCSI offload architecture
is unique as evident by the split between hardware and host processing.