Specifications

0 QSFP1_ModeSel = 1
root@dell-diag-os:/opt/ngos/bin# ./pltool --read --devname=CPLD1 --reg=0x101
BOARD_TYPE : offset 0x101 = 0x1
7: 0 BOARD_TYPE = 1
write Output
ONIE:/diag # ./pltool --write --dev=0x33 --reg=0x0 --val=0x7f
root@dell-diag-os:/opt/ngos/bin# ./pltool --write --devname=CPLD1 --reg=0x102 --
val=0xfa
root@dell-diag-os:/opt/ngos/bin# ./pltool --read --devname=CPLD1 --reg=0x102
SW_SCRATCH : offset 0x102 = 0xfa
7: 0 SW_SCRATCH = fa
test Output
ONIE:/diag # ./pltool --test
Testing Programmable Devices:
PL Tool test:
+ Checking System CPLD 0x31 Reg: 0x0 ............ Passed
+ Checking Master CPLD 0x32 Reg: 0x1 ............ Passed
+ Checking Slave CPLD 0x33 Reg: 0xa ............. Passed
PL Tool: Overall test results --------------- >>> Passed
Configuration File Format
The pltool uses the device tree configuration format.
# C - CHIP (Master | Slave - Cpld or FPGA), Address, Name, Access
# R - Register, Offset, Mask, Name, RW , Default Val
# B - Bit(s), bitnum(s), Name, RW, Default Val
# I - Information on the bits
=====
C | CPLD | 0x00 | MMC CPLD | lpc | 0 | - |Uxx | 0x00 | 0xf
R | 0x100 | 8 | 0xFF | MMC Revision Reg | RO | 0x02 | 1 | 0x0
B | 7:4 | Board Version | RO | 0x0
B | 3:0 | MMC Minor Version | RO | 0x0
R | 0x101 | 8 | 0xFF | MMC Software Scratch Reg | RW | 0xFF | 0 | 0x0
B | 7:0 | Scratchpad Value | RW | 0x5a
R | 0x102 | 8 | 0xFF | MMC Boot OK Reg | RO | 0x0 | 0 | 0x0
B | 7:2 | Reserved | RO | 0x0
B | 1 | CPU Boot OK | RO | 0x1
I | 1 | CPU Did not boot Ok
I | 0 | CPU Booted OK
B | 0 | BIOS OK | RO | 0x0
I | 1 | CPU Boot OK from BIOS 1
I | 0 | CPU Booted OK from BIOS 0
Dell DiagOS Tools 79