Reference Guide

Internal Use - Confidential
Item How is data input to this memory? How is this memory write protected?
Left Status CP
Microcontroller I2C via iDRAC
Hardware strapping
TPM
Trusted Platform Module (TPM) Using TPM Enabled operating
systems
SW write protected
Right FIO 1U Package 1
SPI Flash SPI interface from iDRAC to Right
Control Panel
Embedded iDRAC subsystem firmware actively
controls sub area based write protection as
needed.
BOSS
SPI FLASH By programming the image via
firmware update process
N/A
TFRU During Manufacturing, by
programming the image via firmware
update process.
N/A
During runtime, by I2C Proprietary
Command Protocol
LCD Bezel
Microcontroller Updated as part of secure iDRAC
software update. Configuration
parameters can change only as part
of iDRAC update
Writes are only allowed as part of secure
iDRAC update
PSU
MCU The data is flash via Dell Update
Package(DUP)
SW write protected
FRU During Manufacturing, by
programming the image via firmware
update process
SW write protected
LOM
SPI FLASH The data is flash via Dell Update
Package(DUP)
Reserving write protection function for HW
design.
R1A
MCU The data is flash via iDRAC auto
update
No write protect. Not visible to Host Processor